BibTeX records: Krishnamurthy Soumyanath

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@article{DBLP:journals/jssc/LakdawalaSFLDTBALNLRSCKVPKVSVRJRYS13,
  author       = {Hasnain Lakdawala and
                  Mark Schaecher and
                  Chang{-}Tsung Fu and
                  Rahul Dilip Limaye and
                  Jon Duster and
                  Yulin Tan and
                  Ajay Balankutty and
                  Erkan Alpman and
                  Chun C. Lee and
                  Khoa Minh Nguyen and
                  Hyung{-}Jin Lee and
                  Ashoke Ravi and
                  Satoshi Suzuki and
                  Brent R. Carlton and
                  Hyung Seok Kim and
                  Marian Verhelst and
                  Stefano Pellerano and
                  Tong Kim and
                  Satish Venkatesan and
                  Durgesh Srivastava and
                  Peter Vandervoorn and
                  Jad Rizk and
                  Chia{-}Hong Jan and
                  Sunder Ramamurthy and
                  Raj Yavatkar and
                  Krishnamurthy Soumyanath},
  title        = {A 32 nm SoC With Dual Core {ATOM} Processor and {RF} WiFi Transceiver},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {48},
  number       = {1},
  pages        = {91--103},
  year         = {2013},
  url          = {https://doi.org/10.1109/JSSC.2012.2222812},
  doi          = {10.1109/JSSC.2012.2222812},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/LakdawalaSFLDTBALNLRSCKVPKVSVRJRYS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LakdawalaSFLDTBALSCKVPKSVLVRJSR12,
  author       = {Hasnain Lakdawala and
                  Mark Schaecher and
                  Chang{-}Tsung Fu and
                  Rahul Dilip Limaye and
                  Jon Duster and
                  Yulin Tan and
                  Ajay Balankutty and
                  Erkan Alpman and
                  Chun C. Lee and
                  Satoshi Suzuki and
                  Brent R. Carlton and
                  Hyung Seok Kim and
                  Marian Verhelst and
                  Stefano Pellerano and
                  Tong Kim and
                  Durgesh Srivastava and
                  Satish Venkatesan and
                  Hyung{-}Jin Lee and
                  Peter Vandervoorn and
                  Jad Rizk and
                  Chia{-}Hong Jan and
                  Krishnamurthy Soumyanath and
                  Sunder Ramamurthy},
  title        = {32nm x86 OS-compliant {PC} on-chip with dual-core Atom{\textregistered}
                  processor and {RF} WiFi transceiver},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {62--64},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176879},
  doi          = {10.1109/ISSCC.2012.6176879},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/LakdawalaSFLDTBALSCKVPKSVLVRJSR12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LiOKLRS12,
  author       = {Y. William Li and
                  Carlos Ornelas and
                  Hyung Seok Kim and
                  Hasnain Lakdawala and
                  Ashoke Ravi and
                  Krishnamurthy Soumyanath},
  title        = {A reconfigurable distributed all-digital clock generator core with
                  {SSC} and skew correction in 22nm high-k tri-gate {LP} {CMOS}},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {70--72},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176934},
  doi          = {10.1109/ISSCC.2012.6176934},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/LiOKLRS12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/XuPRSES11,
  author       = {Hongtao Xu and
                  Yorgos Palaskas and
                  Ashoke Ravi and
                  Masoud Sajadieh and
                  Mohammed A. El{-}Tanani and
                  Krishnamurthy Soumyanath},
  title        = {A Flip-Chip-Packaged 25.3 dBm Class-D Outphasing Power Amplifier in
                  32 nm {CMOS} for {WLAN} Application},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {46},
  number       = {7},
  pages        = {1596--1605},
  year         = {2011},
  url          = {https://doi.org/10.1109/JSSC.2011.2143930},
  doi          = {10.1109/JSSC.2011.2143930},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/XuPRSES11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/FuLTS11,
  author       = {Chang{-}Tsung Fu and
                  Hasnain Lakdawala and
                  Stewart S. Taylor and
                  Krishnamurthy Soumyanath},
  title        = {A 2.5GHz 32nm 0.35mm\({}^{\mbox{2}}\) 3.5dB {NF} -5dBm P1dB fully
                  differential {CMOS} push-pull {LNA} with integrated 34dBm {T/R} switch
                  and {ESD} protection},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
                  Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
                  2011},
  pages        = {56--58},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISSCC.2011.5746217},
  doi          = {10.1109/ISSCC.2011.5746217},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/FuLTS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/XuPRS10,
  author       = {Hongtao Xu and
                  Yorgos Palaskas and
                  Ashoke Ravi and
                  Krishnamurthy Soumyanath},
  title        = {A highly linear 25dBm outphasing power amplifier in 32nm {CMOS} for
                  {WLAN} application},
  booktitle    = {36th European Solid-State Circuits Conference, {ESSCIRC} 2010, Sevilla,
                  Spain, September 13-17, 2010},
  pages        = {306--309},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ESSCIRC.2010.5619705},
  doi          = {10.1109/ESSCIRC.2010.5619705},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/XuPRS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WallingLPRDSA09,
  author       = {Jeffrey S. Walling and
                  Hasnain Lakdawala and
                  Yorgos Palaskas and
                  Ashoke Ravi and
                  Ofir Degani and
                  Krishnamurthy Soumyanath and
                  David J. Allstot},
  title        = {A Class-E {PA} With Pulse-Width and Pulse-Position Modulation in 65
                  nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {44},
  number       = {6},
  pages        = {1668--1678},
  year         = {2009},
  url          = {https://doi.org/10.1109/JSSC.2009.2020205},
  doi          = {10.1109/JSSC.2009.2020205},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/WallingLPRDSA09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LakdawalaLRTS09,
  author       = {Hasnain Lakdawala and
                  Y. William Li and
                  Arijit Raychowdhury and
                  Greg Taylor and
                  Krishnamurthy Soumyanath},
  title        = {A 1.05 {V} 1.6 mW, 0.45{\textdegree}C 3{\(\sigma\)} Resolution {\(\Sigma\)}{\(\Delta\)}
                  Based Temperature Sensor With Parasitic Resistance Compensation in
                  32 nm Digital {CMOS} Process},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {44},
  number       = {12},
  pages        = {3621--3630},
  year         = {2009},
  url          = {https://doi.org/10.1109/JSSC.2009.2035553},
  doi          = {10.1109/JSSC.2009.2035553},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/LakdawalaLRTS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/MusahKLSM09,
  author       = {Tawfiq Musah and
                  Sunwoo Kwon and
                  Hasnain Lakdawala and
                  Krishnamurthy Soumyanath and
                  Un{-}Ku Moon},
  title        = {A 630{\(\mu\)}W zero-crossing-based {\(\Delta\)}{\(\Sigma\)} {ADC}
                  using switched-resistor current sources in 45nm {CMOS}},
  booktitle    = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2009, San Jose,
                  California, USA, 13-16 September, 2009, Proceedings},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/CICC.2009.5280909},
  doi          = {10.1109/CICC.2009.5280909},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/MusahKLSM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/AlpmanLCS09,
  author       = {Erkan Alpman and
                  Hasnain Lakdawala and
                  L. Richard Carley and
                  Krishnamurthy Soumyanath},
  title        = {A 1.1V 50mW 2.5GS/s 7b Time-Interleaved {C-2C} {SAR} {ADC} in 45nm
                  {LP} digital {CMOS}},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {76--77},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977315},
  doi          = {10.1109/ISSCC.2009.4977315},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/AlpmanLCS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LiLRTS09,
  author       = {Y. William Li and
                  Hasnain Lakdawala and
                  Arijit Raychowdhury and
                  Greg Taylor and
                  Krishnamurthy Soumyanath},
  title        = {A 1.05V 1.6mW 0.45{\textdegree}C 3{\(\sigma\)}-resolution {\(\Delta\)}{\(\Sigma\)}-based
                  temperature sensor with parasitic-resistance compensation in 32nm
                  {CMOS}},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {340--341},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977447},
  doi          = {10.1109/ISSCC.2009.4977447},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/LiLRTS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/PelleranoPS08,
  author       = {Stefano Pellerano and
                  Yorgos Palaskas and
                  Krishnamurthy Soumyanath},
  title        = {A 64 GHz {LNA} With 15.5 dB Gain and 6.5 dB {NF} in 90 nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {43},
  number       = {7},
  pages        = {1542--1552},
  year         = {2008},
  url          = {https://doi.org/10.1109/JSSC.2008.922395},
  doi          = {10.1109/JSSC.2008.922395},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/PelleranoPS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BanerjeeSA08,
  author       = {Gaurab Banerjee and
                  Krishnamurthy Soumyanath and
                  David J. Allstot},
  title        = {Desensitized {CMOS} Low-Noise Amplifiers},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {55-I},
  number       = {3},
  pages        = {752--765},
  year         = {2008},
  url          = {https://doi.org/10.1109/TCSI.2008.916405},
  doi          = {10.1109/TCSI.2008.916405},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/BanerjeeSA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/ItoLRPRSM08,
  author       = {Hiroyuki Ito and
                  Hasnain Lakdawala and
                  Ashoke Ravi and
                  Stefano Pellerano and
                  Rick Ruby and
                  Krishnamurthy Soumyanath and
                  Kazuya Masu},
  editor       = {William Redman{-}White and
                  Anthony J. Walton},
  title        = {A 1.7-GHz 1.5-mW digitally-controlled {FBAR} oscillator with 0.03-ppb
                  resolution},
  booktitle    = {{ESSCIRC} 2008 - 34th European Solid-State Circuits Conference, Edinburgh,
                  Scotland, UK, 15-19 September 2008},
  pages        = {98--101},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ESSCIRC.2008.4681801},
  doi          = {10.1109/ESSCIRC.2008.4681801},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/esscirc/ItoLRPRSM08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/SeddighradRSLS08,
  author       = {Parmoon Seddighrad and
                  Ashoke Ravi and
                  Masoud Sajadieh and
                  Hasnain Lakdawala and
                  Krishnamurthy Soumyanath},
  editor       = {William Redman{-}White and
                  Anthony J. Walton},
  title        = {A 3.6GHz, 16mW {\(\Sigma\)}{\(\Delta\)} {DAC} for a 802.11n / 802.16e
                  transmitter with 30dB digital power control in 90nm {CMOS}},
  booktitle    = {{ESSCIRC} 2008 - 34th European Solid-State Circuits Conference, Edinburgh,
                  Scotland, UK, 15-19 September 2008},
  pages        = {202--205},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ESSCIRC.2008.4681827},
  doi          = {10.1109/ESSCIRC.2008.4681827},
  timestamp    = {Fri, 25 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/SeddighradRSLS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MallaLKS08,
  author       = {Pukar Malla and
                  Hasnain Lakdawala and
                  Kevin T. Kornegay and
                  Krishnamurthy Soumyanath},
  title        = {A 28mW Spectrum-Sensing Reconfigurable 20MHz 72dB-SNR 70dB-SNDR {DT}
                  {\(\Delta\)}{\(\Sigma\)} {ADC} for 802.11n/WiMAX Receivers},
  booktitle    = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2008, Digest of Technical Papers, San Francisco, CA, USA, February
                  3-7, 2008},
  pages        = {496--497},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISSCC.2008.4523274},
  doi          = {10.1109/ISSCC.2008.4523274},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/MallaLKS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/WallingLPRDSA08,
  author       = {Jeffrey S. Walling and
                  Hasnain Lakdawala and
                  Yorgos Palaskas and
                  Ashoke Ravi and
                  Ofir Degani and
                  Krishnamurthy Soumyanath and
                  David J. Allstot},
  title        = {A 28.6dBm 65nm Class-E {PA} with Envelope Restoration by Pulse-Width
                  and Pulse-Position Modulation},
  booktitle    = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2008, Digest of Technical Papers, San Francisco, CA, USA, February
                  3-7, 2008},
  pages        = {566--567},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISSCC.2008.4523309},
  doi          = {10.1109/ISSCC.2008.4523309},
  timestamp    = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WallingLPRDSA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/PelleranoPS07,
  author       = {Stefano Pellerano and
                  Yorgos Palaskas and
                  Krishnamurthy Soumyanath},
  editor       = {Doris Schmitt{-}Landsiedel and
                  Tobias Noll},
  title        = {A 64GHz 6.5 dB {NF} 15.5 dB gain {LNA} in 90nm {CMOS}},
  booktitle    = {33rd European Solid-State Circuits Conference, {ESSCIRC} 2007, Munich,
                  Germany, 11-13 September 2007},
  pages        = {352--355},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ESSCIRC.2007.4430316},
  doi          = {10.1109/ESSCIRC.2007.4430316},
  timestamp    = {Mon, 18 Oct 2021 17:08:49 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/PelleranoPS07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ElmalaPS06,
  author       = {Mostafa Elmala and
                  Jeyanandh Paramesh and
                  Krishnamurthy Soumyanath},
  title        = {A 90-nm {CMOS} Doherty power amplifier with minimum {AM-PM} distortion},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {41},
  number       = {6},
  pages        = {1323--1332},
  year         = {2006},
  url          = {https://doi.org/10.1109/JSSC.2006.874284},
  doi          = {10.1109/JSSC.2006.874284},
  timestamp    = {Fri, 15 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ElmalaPS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/PalaskasTPRMBRL06,
  author       = {Yorgos Palaskas and
                  Stewart S. Taylor and
                  Stefano Pellerano and
                  Ian A. Rippke and
                  Ralph E. Bishop and
                  Ashoke Ravi and
                  Hasnain Lakdawala and
                  Krishnamurthy Soumyanath},
  title        = {A 5-GHz 20-dBm Power Amplifier With Digitally Assisted {AM-PM} Correction
                  in a 90-nm {CMOS} Process},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {41},
  number       = {8},
  pages        = {1757--1763},
  year         = {2006},
  url          = {https://doi.org/10.1109/JSSC.2006.877255},
  doi          = {10.1109/JSSC.2006.877255},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/PalaskasTPRMBRL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/PalaskasRPCEBBN06,
  author       = {Yorgos Palaskas and
                  Ashoke Ravi and
                  Stefano Pellerano and
                  Brent R. Carlton and
                  Mostafa A. Elmala and
                  Ralph E. Bishop and
                  Gaurab Banerjee and
                  Rich B. Nicholls and
                  Stanley K. Ling and
                  Nati Dinur and
                  Stewart S. Taylor and
                  Krishnamurthy Soumyanath},
  title        = {A 5-GHz 108-Mb/s 2 {\textdollar}{\textbackslash}times{\textdollar}2
                  {MIMO} Transceiver {RFIC} With Fully Integrated 20.5-dBm {\textdollar}\{{\textbackslash}rm
                  P\}{\_}\{{\textbackslash}rm 1dB\}{\textdollar} Power Amplifiers in
                  90-nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {41},
  number       = {12},
  pages        = {2746--2756},
  year         = {2006},
  url          = {https://doi.org/10.1109/JSSC.2006.884795},
  doi          = {10.1109/JSSC.2006.884795},
  timestamp    = {Fri, 15 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/PalaskasRPCEBBN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/PalaskasRPCEBBN06,
  author       = {Yorgos Palaskas and
                  Ashoke Ravi and
                  Stefano Pellerano and
                  Brent R. Carlton and
                  Mostafa A. Elmala and
                  Ralph E. Bishop and
                  Gaurab Banerjee and
                  Rich B. Nicholls and
                  Stanley K. Ling and
                  Stewart S. Taylor and
                  Krishnamurthy Soumyanath},
  title        = {A 5GHz 108Mb/s 2x2 {MIMO} Transceiver with Fully Integrated +16dBm
                  PAs in 90nm {CMOS}},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {1420--1429},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696192},
  doi          = {10.1109/ISSCC.2006.1696192},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/PalaskasRPCEBBN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ParameshBSA05,
  author       = {Jeyanandh Paramesh and
                  Ralph Bishop and
                  Krishnamurthy Soumyanath and
                  David J. Allstot},
  title        = {A four-antenna receiver in 90-nm {CMOS} for beamforming and spatial
                  diversity},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {40},
  number       = {12},
  pages        = {2515--2524},
  year         = {2005},
  url          = {https://doi.org/10.1109/JSSC.2005.857416},
  doi          = {10.1109/JSSC.2005.857416},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/ParameshBSA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/PalaskasBRS05,
  author       = {Yorgos Palaskas and
                  Ralph E. Bishop and
                  Ashoke Ravi and
                  Krishnamurthy Soumyanath},
  title        = {A 90-nm MOS-only 3-11GHz transmitter for {UWB}},
  booktitle    = {Proceedings of the {IEEE} 2005 Custom Integrated Circuits Conference,
                  {CICC} 2005, DoubleTree Hotel, San Jose, California, USA, September
                  18-21, 2005},
  pages        = {165--168},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/CICC.2005.1568633},
  doi          = {10.1109/CICC.2005.1568633},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/PalaskasBRS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/PalaskasTPRBRLS05,
  author       = {Yorgos Palaskas and
                  Stewart S. Taylor and
                  Stefano Pellerano and
                  Ian A. Rippke and
                  Ralph E. Bishop and
                  Ashoke Ravi and
                  Hasnain Lakdawala and
                  Krishnamurthy Soumyanath},
  title        = {A 5 GHz class-AB power amplifier in 90 nm {CMOS} with digitally-assisted
                  {AM-PM} correction},
  booktitle    = {Proceedings of the {IEEE} 2005 Custom Integrated Circuits Conference,
                  {CICC} 2005, DoubleTree Hotel, San Jose, California, USA, September
                  18-21, 2005},
  pages        = {813--816},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/CICC.2005.1568793},
  doi          = {10.1109/CICC.2005.1568793},
  timestamp    = {Wed, 17 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/PalaskasTPRBRLS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/PeachRBSA05,
  author       = {Charles T. Peach and
                  Ashoke Ravi and
                  Rosie Bishop and
                  Krishnamurthy Soumyanath and
                  David J. Allstot},
  editor       = {Laurent Fesquet and
                  Andreas Kaiser and
                  Sorin Cristoloveanu and
                  Michel Brillou{\"{e}}t},
  title        = {A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm
                  {CMOS}},
  booktitle    = {Proceedings of the 31st European Solid-State Circuits Conference,
                  {ESSCIRC} 2005, Grenoble, France, 12-16 September 2005},
  pages        = {535--538},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ESSCIR.2005.1541678},
  doi          = {10.1109/ESSCIR.2005.1541678},
  timestamp    = {Fri, 28 Apr 2023 15:39:25 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/PeachRBSA05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HazuchaKWBTMSDN04,
  author       = {Peter Hazucha and
                  Tanay Karnik and
                  Steven Walstra and
                  Bradley A. Bloechel and
                  James W. Tschanz and
                  Jose Maiz and
                  Krishnamurthy Soumyanath and
                  Gregory E. Dermer and
                  Siva G. Narendra and
                  Vivek De and
                  Shekhar Borkar},
  title        = {Measurements and analysis of SER-tolerant latch in a 90-nm dual-V\({}_{\mbox{T}}\)
                  {CMOS} process},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {39},
  number       = {9},
  pages        = {1536--1543},
  year         = {2004},
  url          = {https://doi.org/10.1109/JSSC.2004.831449},
  doi          = {10.1109/JSSC.2004.831449},
  timestamp    = {Wed, 27 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/HazuchaKWBTMSDN04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BanerjeeBHAS04,
  author       = {Gaurab Banerjee and
                  David T. Becher and
                  Celia Hung and
                  David J. Allstot and
                  Krishnamurthy Soumyanath},
  title        = {Measurement and modeling of noise parameters for desensitized low
                  noise amplifiers},
  booktitle    = {Proceedings of the {IEEE} 2004 Custom Integrated Circuits Conference,
                  {CICC} 2004, Orlando, FL, USA, October 2004},
  pages        = {387--390},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/CICC.2004.1358829},
  doi          = {10.1109/CICC.2004.1358829},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/BanerjeeBHAS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/RaviBCS04,
  author       = {Ashoke Ravi and
                  Ralph E. Bishop and
                  L. Richard Carley and
                  Krishnamurthy Soumyanath},
  title        = {8 GHz, 20mW, fast locking, fractional-N frequency synthesizer with
                  optimized 3\({}^{\mbox{rd}}\) order, 3/5-bit {IIR} and 3\({}^{\mbox{rd}}\)
                  order 3-bit-FIR noise shapers in 90nm {CMOS}},
  booktitle    = {Proceedings of the {IEEE} 2004 Custom Integrated Circuits Conference,
                  {CICC} 2004, Orlando, FL, USA, October 2004},
  pages        = {625--628},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/CICC.2004.1358903},
  doi          = {10.1109/CICC.2004.1358903},
  timestamp    = {Mon, 21 Aug 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/RaviBCS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/BanerjeeBHSA04,
  author       = {Gaurab Banerjee and
                  David T. Becher and
                  Celia Hung and
                  Krishnamurthy Soumyanath and
                  David J. Allstot},
  title        = {Desensitized design of {MOS} low noise amplifiers by R\({}_{\mbox{n}}\)
                  minimization},
  booktitle    = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
                  Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
                  2004},
  pages        = {619--622},
  publisher    = {{IEEE}},
  year         = {2004},
  url          = {https://doi.org/10.1109/ICECS.2004.1399757},
  doi          = {10.1109/ICECS.2004.1399757},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/BanerjeeBHSA04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/HazuchaKWBTMSDN03,
  author       = {Peter Hazucha and
                  Tanay Kamik and
                  Steven Walstra and
                  Bradley A. Bloechel and
                  James W. Tschanz and
                  Jose Maiz and
                  Krishnamurthy Soumyanath and
                  Greg Dermer and
                  Siva G. Narendra and
                  Vivek De and
                  Shekhar Borkar},
  title        = {Measurements and analysis of {SER} tolerant latch in a 90 nm dual-Vt
                  {CMOS} process},
  booktitle    = {Proceedings of the {IEEE} Custom Integrated Circuits Conference, {CICC}
                  2003, San Jose, CA, USA, September 21 - 24, 2003},
  pages        = {617--620},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/CICC.2003.1249472},
  doi          = {10.1109/CICC.2003.1249472},
  timestamp    = {Mon, 28 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/cicc/HazuchaKWBTMSDN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/FrancaNetoBS03,
  author       = {Luiz M. Franca{-}Neto and
                  Bradley A. Bloechel and
                  Krishnamurthy Soumyanath},
  editor       = {Jos{\'{e}} E. Franca and
                  Rudolf Koch},
  title        = {17GHz and 24GHz {LNA} designs based on extended-S-parameter with microstrip-on-die
                  in 0.18{\(\mu\)}m logic {CMOS} technology},
  booktitle    = {{ESSCIRC} 2003 - 29th European Solid-State Circuits Conference, Estoril,
                  Portugal, September 16-18, 2003},
  pages        = {149--152},
  publisher    = {{IEEE}},
  year         = {2003},
  url          = {https://doi.org/10.1109/ESSCIRC.2003.1257094},
  doi          = {10.1109/ESSCIRC.2003.1257094},
  timestamp    = {Fri, 08 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/FrancaNetoBS03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KrishnamurthyAB02,
  author       = {Ram K. Krishnamurthy and
                  Atila Alvandpour and
                  Ganesh Balamurugan and
                  Naresh R. Shanbhag and
                  Krishnamurthy Soumyanath and
                  Shekhar Y. Borkar},
  title        = {A 130-nm 6-GHz 256 {\texttimes} 32 bit leakage-tolerant register file},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {37},
  number       = {5},
  pages        = {624--632},
  year         = {2002},
  url          = {https://doi.org/10.1109/4.997856},
  doi          = {10.1109/4.997856},
  timestamp    = {Wed, 06 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KrishnamurthyAB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AlvandpourKSB02,
  author       = {Atila Alvandpour and
                  Ram K. Krishnamurthy and
                  Krishnamurthy Soumyanath and
                  Shekhar Y. Borkar},
  title        = {A sub-130-nm conditional keeper technique},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {37},
  number       = {5},
  pages        = {633--638},
  year         = {2002},
  url          = {https://doi.org/10.1109/4.997857},
  doi          = {10.1109/4.997857},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/AlvandpourKSB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/VangalABSGEWPVT02,
  author       = {Sriram R. Vangal and
                  Mark A. Anders and
                  Nitin Borkar and
                  Erik Seligman and
                  Venkatesh Govindarajulu and
                  Vasantha Erraguntla and
                  Howard Wilson and
                  Amaresh Pangal and
                  Venkat Veeramachaneni and
                  James W. Tschanz and
                  Yibin Ye and
                  Dinesh Somasekhar and
                  Bradley A. Bloechel and
                  Gregory E. Dermer and
                  Ram K. Krishnamurthy and
                  Krishnamurthy Soumyanath and
                  Sanu Mathew and
                  Siva G. Narendra and
                  Mircea R. Stan and
                  Scott Thompson and
                  Vivek De and
                  Shekhar Borkar},
  title        = {5-GHz 32-bit integer execution core in 130-nm dual-V\({}_{\mbox{T}}\)
                  {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {37},
  number       = {11},
  pages        = {1421--1432},
  year         = {2002},
  url          = {https://doi.org/10.1109/JSSC.2002.803944},
  doi          = {10.1109/JSSC.2002.803944},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/VangalABSGEWPVT02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/MathewKARMS01,
  author       = {Sanu K. Mathew and
                  Ram K. Krishnamurthy and
                  Mark A. Anders and
                  Rafael Rios and
                  Kaizad R. Mistry and
                  Krishnamurthy Soumyanath},
  title        = {Sub-500-ps 64-b ALUs in 0.18-{\(\mu\)}m SOI/bulk {CMOS:} design and
                  scaling trends},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {36},
  number       = {11},
  pages        = {1636--1646},
  year         = {2001},
  url          = {https://doi.org/10.1109/4.962283},
  doi          = {10.1109/4.962283},
  timestamp    = {Wed, 06 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/MathewKARMS01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KrishnamurthyASB01,
  author       = {Ram Krishnamurthy and
                  Mark A. Anders and
                  Krishnamurthy Soumyanath and
                  Shekhar Borkar},
  editor       = {Kaushik Roy and
                  Sung{-}Mo Kang and
                  Cheng{-}Kok Koh},
  title        = {Leakage control and tolerance challenges for sub-0.1{\(\mathrm{\mu}\)}m
                  microprocessor circuits},
  booktitle    = {Proceedings of the 11th {ACM} Great Lakes Symposium on {VLSI} 2001,
                  West Lafayette, Indiana, USA, 2001},
  pages        = {43--44},
  publisher    = {{ACM}},
  year         = {2001},
  url          = {https://doi.org/10.1145/368122.368742},
  doi          = {10.1145/368122.368742},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/KrishnamurthyASB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/AlvandpourKSB01,
  author       = {Atila Alvandpour and
                  Ram Krishnamurthy and
                  Krishnamurthy Soumyanath and
                  Shekhar Borkar},
  editor       = {Enrico Macii and
                  Vivek De and
                  Mary Jane Irwin},
  title        = {A low-leakage dynamic multi-ported register file in 0.13mm {CMOS}},
  booktitle    = {Proceedings of the 2001 International Symposium on Low Power Electronics
                  and Design, 2001, Huntington Beach, California, USA, 2001},
  pages        = {68--71},
  publisher    = {{ACM}},
  year         = {2001},
  url          = {https://doi.org/10.1145/383082.383096},
  doi          = {10.1145/383082.383096},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/islped/AlvandpourKSB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/ShanbhagSM00,
  author       = {Naresh R. Shanbhag and
                  Krishnamurthy Soumyanath and
                  Samuel Martin},
  editor       = {David T. Blaauw and
                  Christian C. Enz and
                  Thaddeus Gabara and
                  Enrico Macii},
  title        = {Reliable low-power design in the presence of deep submicron noise
                  (embedded tutorial session)},
  booktitle    = {Proceedings of the 2000 International Symposium on Low Power Electronics
                  and Design, 2000, Rapallo, Italy, July 25-27, 2000},
  pages        = {295--302},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/344166.344642},
  doi          = {10.1145/344166.344642},
  timestamp    = {Wed, 02 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/islped/ShanbhagSM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KeshavarziRHSSD00,
  author       = {Ali Keshavarzi and
                  Kaushik Roy and
                  Charles F. Hawkins and
                  Manoj Sachdev and
                  Krishnamurthy Soumyanath and
                  Vivek De},
  title        = {Multiple-parameter {CMOS} {IC} testing with increased sensitivity
                  for I{\_}DDQ},
  booktitle    = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
                  NJ, USA, October 2000},
  pages        = {1051--1059},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/TEST.2000.894318},
  doi          = {10.1109/TEST.2000.894318},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/KeshavarziRHSSD00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SoumyanathBZB99,
  author       = {Krishnamurthy Soumyanath and
                  Shekhar Borkar and
                  Chunyan Zhou and
                  Bradley A. Bloechel},
  title        = {Accurate on-chip interconnect evaluation: a time-domain technique},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {34},
  number       = {5},
  pages        = {623--631},
  year         = {1999},
  url          = {https://doi.org/10.1109/4.760372},
  doi          = {10.1109/4.760372},
  timestamp    = {Tue, 05 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SoumyanathBZB99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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