BibTeX records: Sudhanshu Vyas

download as .bib file

@article{DBLP:journals/todaes/GupteVJ15,
  author       = {Adwait Gupte and
                  Sudhanshu Vyas and
                  Phillip H. Jones},
  title        = {A Fault-Aware Toolchain Approach for {FPGA} Fault Tolerance},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {20},
  number       = {2},
  pages        = {32:1--32:22},
  year         = {2015},
  url          = {https://doi.org/10.1145/2699838},
  doi          = {10.1145/2699838},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/GupteVJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpl/MillsZVZJ15,
  author       = {Aaron Mills and
                  Pei Zhang and
                  Sudhanshu Vyas and
                  Joseph Zambreno and
                  Phillip H. Jones},
  title        = {A software configurable coprocessor-based state-space controller},
  booktitle    = {25th International Conference on Field Programmable Logic and Applications,
                  {FPL} 2015, London, United Kingdom, September 2-4, 2015},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/FPL.2015.7293752},
  doi          = {10.1109/FPL.2015.7293752},
  timestamp    = {Thu, 11 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpl/MillsZVZJ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/esl/VyasNZGCJ14,
  author       = {Sudhanshu Vyas and
                  Chetan Kumar Ng and
                  Joseph Zambreno and
                  Christopher D. Gill and
                  Ron Cytron and
                  Phillip H. Jones},
  title        = {An FPGA-Based Plant-on-Chip Platform for Cyber-Physical System Analysis},
  journal      = {{IEEE} Embed. Syst. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {4--7},
  year         = {2014},
  url          = {https://doi.org/10.1109/LES.2013.2262107},
  doi          = {10.1109/LES.2013.2262107},
  timestamp    = {Thu, 10 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/esl/VyasNZGCJ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijes/KumarVCGZJ14,
  author       = {N. G. Chetan Kumar and
                  Sudhanshu Vyas and
                  Ron K. Cytron and
                  Christopher D. Gill and
                  Joseph Zambreno and
                  Phillip H. Jones},
  title        = {Hardware-software architecture for priority queue management in real-time
                  and embedded systems},
  journal      = {Int. J. Embed. Syst.},
  volume       = {6},
  number       = {4},
  pages        = {319--334},
  year         = {2014},
  url          = {https://doi.org/10.1504/IJES.2014.064997},
  doi          = {10.1504/IJES.2014.064997},
  timestamp    = {Fri, 11 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijes/KumarVCGZJ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/KumarVCGZJ14,
  author       = {N. G. Chetan Kumar and
                  Sudhanshu Vyas and
                  Ron K. Cytron and
                  Christopher D. Gill and
                  Joseph Zambreno and
                  Phillip H. Jones},
  title        = {Cache design for mixed criticality real-time systems},
  booktitle    = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014,
                  Seoul, South Korea, October 19-22, 2014},
  pages        = {513--516},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ICCD.2014.6974730},
  doi          = {10.1109/ICCD.2014.6974730},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/KumarVCGZJ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tecs/VyasGGCZJ13,
  author       = {Sudhanshu Vyas and
                  Adwait Gupte and
                  Christopher D. Gill and
                  Ron K. Cytron and
                  Joseph Zambreno and
                  Phillip H. Jones},
  title        = {Hardware architectural support for control systems and sensor processing},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {13},
  number       = {2},
  pages        = {16:1--16:25},
  year         = {2013},
  url          = {https://doi.org/10.1145/2514641.2514643},
  doi          = {10.1145/2514641.2514643},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/VyasGGCZJ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccS/NgVCGZJ13,
  author       = {Chetan Kumar Ng and
                  Sudhanshu Vyas and
                  Ron K. Cytron and
                  Christopher D. Gill and
                  Joseph Zambreno and
                  Phillip H. Jones},
  editor       = {Vassil Alexandrov and
                  Michael Lees and
                  Valeria V. Krzhizhanovskaya and
                  Jack J. Dongarra and
                  Peter M. A. Sloot},
  title        = {Scheduling Challenges in Mixed Critical Real-Time Heterogeneous Computing
                  Platforms},
  booktitle    = {Proceedings of the International Conference on Computational Science,
                  {ICCS} 2013, Barcelona, Spain, 5-7 June, 2013},
  series       = {Procedia Computer Science},
  volume       = {18},
  pages        = {1891--1898},
  publisher    = {Elsevier},
  year         = {2013},
  url          = {https://doi.org/10.1016/j.procs.2013.05.358},
  doi          = {10.1016/J.PROCS.2013.05.358},
  timestamp    = {Wed, 12 Jul 2023 15:16:18 +0200},
  biburl       = {https://dblp.org/rec/conf/iccS/NgVCGZJ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/MillsVPSJZ12,
  author       = {Aaron Mills and
                  Sudhanshu Vyas and
                  Michael Patterson and
                  Christopher Sabotta and
                  Phillip H. Jones and
                  Joseph Zambreno},
  title        = {Design and evaluation of a delay-based {FPGA} Physically Unclonable
                  Function},
  booktitle    = {30th International {IEEE} Conference on Computer Design, {ICCD} 2012,
                  Montreal, QC, Canada, September 30 - Oct. 3, 2012},
  pages        = {143--146},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/ICCD.2012.6378632},
  doi          = {10.1109/ICCD.2012.6378632},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/MillsVPSJZ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:journals/procedia/NgVSCGZJ12,
  author       = {Chetan Kumar Ng and
                  Sudhanshu Vyas and
                  Jonathan A. Shidal and
                  Ron K. Cytron and
                  Christopher D. Gill and
                  Joseph Zambreno and
                  Phillip H. Jones},
  editor       = {Hesham H. Ali and
                  Yong Shi and
                  Deepak Khazanchi and
                  Michael Lees and
                  G. Dick van Albada and
                  Jack J. Dongarra and
                  Peter M. A. Sloot},
  title        = {Improving System Predictability and Performance via Hardware Accelerated
                  Data Structures},
  booktitle    = {Proceedings of the International Conference on Computational Science,
                  {ICCS} 2012, Omaha, Nebraska, USA, 4-6 June, 2012},
  series       = {Procedia Computer Science},
  volume       = {9},
  pages        = {1197--1205},
  publisher    = {Elsevier},
  year         = {2012},
  url          = {https://doi.org/10.1016/j.procs.2012.04.129},
  doi          = {10.1016/J.PROCS.2012.04.129},
  timestamp    = {Thu, 08 Jul 2021 16:04:01 +0200},
  biburl       = {https://dblp.org/rec/journals/procedia/NgVSCGZJ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memocode/VyasMASSPJNSSJ10,
  author       = {Sudhanshu Vyas and
                  Pooja Mhapsekar and
                  Aditya Ashok and
                  Moinuddin Sayed and
                  Avinash Srinivasa and
                  Gunjan Pandey and
                  Adam Jackson and
                  Matthew Nelson and
                  Anand Saggi and
                  Harini Sundararaman and
                  Phillip H. Jones},
  title        = {Team [Ii][Ss][Uu][0-2]\{4\} design overview: {MEMOCODE} 2010 design
                  contest},
  booktitle    = {8th {ACM/IEEE} International Conference on Formal Methods and Models
                  for Codesign {(MEMOCODE} 2010), Grenoble, France, 26-28 July 2010},
  pages        = {99--102},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/MEMCOD.2010.5558645},
  doi          = {10.1109/MEMCOD.2010.5558645},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memocode/VyasMASSPJNSSJ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.