BibTeX records: Jiansong Wan

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@article{DBLP:journals/aei/WanLS24,
  author       = {Jiansong Wan and
                  Kanghoon Lee and
                  Hayong Shin},
  title        = {Traffic pattern-aware elevator dispatching via deep reinforcement
                  learning},
  journal      = {Adv. Eng. Informatics},
  volume       = {61},
  pages        = {102497},
  year         = {2024},
  url          = {https://doi.org/10.1016/j.aei.2024.102497},
  doi          = {10.1016/J.AEI.2024.102497},
  timestamp    = {Thu, 04 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/aei/WanLS24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/eaai/YuWAYX24,
  author       = {Xiaoqun Yu and
                  Jiansong Wan and
                  Guoyuan An and
                  Xu Yin and
                  Shuping Xiong},
  title        = {A novel semi-supervised model for pre-impact fall detection with limited
                  fall data},
  journal      = {Eng. Appl. Artif. Intell.},
  volume       = {132},
  pages        = {108469},
  year         = {2024},
  url          = {https://doi.org/10.1016/j.engappai.2024.108469},
  doi          = {10.1016/J.ENGAPPAI.2024.108469},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/eaai/YuWAYX24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/anor/HuangW22,
  author       = {Yan Huang and
                  Jiansong Wan},
  title        = {Hierarchical analysis of Chinese financial market based on manifold
                  structure},
  journal      = {Ann. Oper. Res.},
  volume       = {315},
  number       = {2},
  pages        = {1135--1150},
  year         = {2022},
  url          = {https://doi.org/10.1007/s10479-021-03959-8},
  doi          = {10.1007/S10479-021-03959-8},
  timestamp    = {Mon, 26 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/anor/HuangW22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijpr/WanS22,
  author       = {Jiansong Wan and
                  Hayong Shin},
  title        = {Predictive vehicle dispatching method for overhead hoist transport
                  systems in semiconductor fabs},
  journal      = {Int. J. Prod. Res.},
  volume       = {60},
  number       = {10},
  pages        = {3063--3077},
  year         = {2022},
  url          = {https://doi.org/10.1080/00207543.2021.1910870},
  doi          = {10.1080/00207543.2021.1910870},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijpr/WanS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/MulderVKBCSZRYI15,
  author       = {Jan Mulder and
                  Davide Vecchi and
                  Yi Ke and
                  Stefano Bozzola and
                  Mark Core and
                  Nitz Saputra and
                  Qiongna Zhang and
                  Jeff Riley and
                  Han Yan and
                  Mattia Introini and
                  Sijia Wang and
                  Christopher M. Ward and
                  Jan R. Westra and
                  Jiansong Wan and
                  Klaas Bult},
  title        = {26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm {CMOS}},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7063126},
  doi          = {10.1109/ISSCC.2015.7063126},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/MulderVKBCSZRYI15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cicc/WestraMKVLAWZWGB14,
  author       = {Jan R. Westra and
                  Jan Mulder and
                  Yi Ke and
                  Davide Vecchi and
                  Xiaodong Liu and
                  Erol Arslan and
                  Jiansong Wan and
                  Qiongna Zhang and
                  Sijia Wang and
                  Frank M. L. van der Goes and
                  Klaas Bult},
  title        = {Design considerations for low-power analog front ends in full-duplex
                  10GBASE-T transceivers},
  booktitle    = {Proceedings of the {IEEE} 2014 Custom Integrated Circuits Conference,
                  {CICC} 2014, San Jose, CA, USA, September 15-17, 2014},
  pages        = {1--8},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/CICC.2014.6945981},
  doi          = {10.1109/CICC.2014.6945981},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/cicc/WestraMKVLAWZWGB14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/WestraMKVLAWZWG14,
  author       = {Jan R. Westra and
                  Jan Mulder and
                  Yi Ke and
                  Davide Vecchi and
                  Xiaodong Liu and
                  Erol Arslan and
                  Jiansong Wan and
                  Qiongna Zhang and
                  Sijia Wang and
                  Frank M. L. van der Goes and
                  Klaas Bult},
  title        = {8.5 {A} sub-1.75W full-duplex 10GBASE-T transceiver in 40nm {CMOS}},
  booktitle    = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
                  {ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
                  February 9-13, 2014},
  pages        = {146--147},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISSCC.2014.6757375},
  doi          = {10.1109/ISSCC.2014.6757375},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WestraMKVLAWZWG14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/VecchiMGWAWWB11,
  author       = {Davide Vecchi and
                  Jan Mulder and
                  Frank M. L. van der Goes and
                  Jan R. Westra and
                  Emre Ayranci and
                  Christopher M. Ward and
                  Jiansong Wan and
                  Klaas Bult},
  title        = {An 800 MS/s Dual-Residue Pipeline {ADC} in 40 nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {46},
  number       = {12},
  pages        = {2834--2844},
  year         = {2011},
  url          = {https://doi.org/10.1109/JSSC.2011.2164301},
  doi          = {10.1109/JSSC.2011.2164301},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/VecchiMGWAWWB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/MulderGVWAWWB11,
  author       = {Jan Mulder and
                  Frank M. L. van der Goes and
                  Davide Vecchi and
                  Jan R. Westra and
                  Emre Ayranci and
                  Christopher M. Ward and
                  Jiansong Wan and
                  Klaas Bult},
  title        = {An 800MS/s dual-residue pipeline {ADC} in 40nm {CMOS}},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
                  Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
                  2011},
  pages        = {184--186},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISSCC.2011.5746274},
  doi          = {10.1109/ISSCC.2011.5746274},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/MulderGVWAWWB11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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