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ORCIDBibTeX records: Cheng-Wen Wu
@article{DBLP:journals/tvlsi/TanW23,
author = {Pai{-}Yu Tan and
Cheng{-}Wen Wu},
title = {A 40-nm 1.89-pJ/SOP Scalable Convolutional Spiking Neural Network
Learning Core With On-Chip Spatiotemporal Back-Propagation},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {31},
number = {12},
pages = {1994--2007},
year = {2023},
url = {https://doi.org/10.1109/TVLSI.2023.3327417},
doi = {10.1109/TVLSI.2023.3327417},
timestamp = {Sun, 10 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/TanW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/ChuangLCBWGM23,
author = {Po{-}Yao Chuang and
Francesco Lorenzelli and
Sreejit Chakravarty and
Slimane Boutobza and
Cheng{-}Wen Wu and
Georges G. E. Gielen and
Erik Jan Marinissen},
title = {Effective and Efficient Test and Diagnosis Pattern Generation for
Many Inter-Die Interconnects in Chiplet-Based Packages},
booktitle = {{IEEE} International 3D Systems Integration Conference, 3DIC 2023,
Cork, Ireland, May 10-12, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/3DIC57175.2023.10154900},
doi = {10.1109/3DIC57175.2023.10154900},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/3dic/ChuangLCBWGM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TanW23,
author = {Pai{-}Yu Tan and
Cheng{-}Wen Wu},
editor = {Atsushi Takahashi},
title = {A Low-Bitwidth Integer-STBP Algorithm for Efficient Training and Inference
of Spiking Neural Networks},
booktitle = {Proceedings of the 28th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2023, Tokyo, Japan, January 16-19, 2023},
pages = {651--656},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3566097.3567875},
doi = {10.1145/3566097.3567875},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/TanW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChuangLCWGM23,
author = {Po{-}Yao Chuang and
Francesco Lorenzelli and
Sreejit Chakravarty and
Cheng{-}Wen Wu and
Georges G. E. Gielen and
Erik Jan Marinissen},
title = {Effective and Efficient Testing of Large Numbers of Inter-Die Interconnects
in Chiplet-Based Multi-Die Packages},
booktitle = {41st {IEEE} {VLSI} Test Symposium, {VTS} 2023, San Diego, CA, USA,
April 24-26, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VTS56346.2023.10140006},
doi = {10.1109/VTS56346.2023.10140006},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChuangLCWGM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/ChenFYMLW22,
author = {Wei{-}Han Chen and
Yang{-}Chih Feng and
Ming{-}Chia Yeh and
Hsi{-}Pin Ma and
Chiang Liu and
Cheng{-}Wen Wu},
title = {Impact Position Estimation for Baseball Batting with a Force-Irrelevant
Vibration Feature},
journal = {Sensors},
volume = {22},
number = {4},
pages = {1553},
year = {2022},
url = {https://doi.org/10.3390/s22041553},
doi = {10.3390/S22041553},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sensors/ChenFYMLW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sj/WuSLYCHHCTCLHLJ22,
author = {Cheng{-}Wen Wu and
Ming{-}Der Shieh and
Jenn{-}Jier James Lien and
Jar{-}Ferr Yang and
Wei{-}Ta Chu and
Tsang{-}Hai Huang and
Han{-}Chuan Hsieh and
Hung{-}Ta Chiu and
Kuo{-}Cheng Tu and
Yen{-}Ting Chen and
Shian{-}Yu Lin and
Jia{-}Jun Hu and
Chen{-}Huan Lin and
Cheng{-}Siang Jheng},
title = {Enhancing Fan Engagement in a 5G Stadium With AI-Based Technologies
and Live Streaming},
journal = {{IEEE} Syst. J.},
volume = {16},
number = {4},
pages = {6590--6601},
year = {2022},
url = {https://doi.org/10.1109/JSYST.2022.3169553},
doi = {10.1109/JSYST.2022.3169553},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sj/WuSLYCHHCTCLHLJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/DuhWSCF22,
author = {Kuan{-}Hsun Duh and
Cheng{-}Wen Wu and
Ming{-}Der Shieh and
Chao{-}Hsun Chen and
Ming{-}Yan Fan},
title = {Aging Impact of Power MOSFETs in Charger with Different Operation
Frequency},
booktitle = {{IEEE} 31st Asian Test Symposium, {ATS} 2022, Taichung City, Taiwan,
November 21-24, 2022},
pages = {54--59},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ATS56056.2022.00022},
doi = {10.1109/ATS56056.2022.00022},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/DuhWSCF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChouWSC22,
author = {Yu{-}You Chou and
Cheng{-}Wen Wu and
Ming{-}Der Shieh and
Chao{-}Hsun Chen},
title = {Battery Pack Reliability and Endurance Enhancement for Electric Vehicles
by Dynamic Reconfiguration},
booktitle = {{IEEE} 31st Asian Test Symposium, {ATS} 2022, Taichung City, Taiwan,
November 21-24, 2022},
pages = {66--71},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ATS56056.2022.00024},
doi = {10.1109/ATS56056.2022.00024},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChouWSC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HouCTWL22,
author = {Kuan{-}Wei Hou and
Hsueh{-}Hung Cheng and
Chi Tung and
Cheng{-}Wen Wu and
Juin{-}Ming Lu},
title = {Fault Modeling and Testing of Memristor-Based Spiking Neural Networks},
booktitle = {{IEEE} International Test Conference, {ITC} 2022, Anaheim, CA, USA,
September 23-30, 2022},
pages = {92--99},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ITC50671.2022.00016},
doi = {10.1109/ITC50671.2022.00016},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/HouCTWL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChengTWSCL22,
author = {Ya{-}Chi Cheng and
Pai{-}Yu Tan and
Cheng{-}Wen Wu and
Ming{-}Der Shieh and
Chien{-}Hui Chuang and
Gordon Liao},
title = {Improving Test Quality of Memory Chips by a Decision Tree-Based Screening
Method},
booktitle = {{IEEE} International Test Conference, {ITC} 2022, Anaheim, CA, USA,
September 23-30, 2022},
pages = {601--608},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ITC50671.2022.00080},
doi = {10.1109/ITC50671.2022.00080},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChengTWSCL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/ChengTWSCL22,
author = {Ya{-}Chi Cheng and
Pai{-}Yu Tan and
Cheng{-}Wen Wu and
Ming{-}Der Shieh and
Chien{-}Hui Chuang and
Gordon Liao},
title = {A Decision Tree-Based Screening Method for Improving Test Quality
of Memory Chips},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2022, Taipei,
Taiwan, August 24-26, 2022},
pages = {19--24},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ITCAsia55616.2022.00014},
doi = {10.1109/ITCASIA55616.2022.00014},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/ChengTWSCL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/LinTWSCL22,
author = {Shian{-}Yu Lin and
Pai{-}Yu Tan and
Cheng{-}Wen Wu and
Ming{-}Der Shieh and
Chien{-}Hui Chuang and
Gordon Liao},
title = {Weak Die Screening by Feature Prioritized Random Forest for Improving
Semiconductor Quality and Reliability},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2022, Taipei,
Taiwan, August 24-26, 2022},
pages = {25--30},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ITCAsia55616.2022.00015},
doi = {10.1109/ITCASIA55616.2022.00015},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/LinTWSCL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/TanTWLL22,
author = {Pai{-}Yu Tan and
Chih{-}Hsuan Tung and
Cheng{-}Wen Wu and
Mincent Lee and
Gordon Liao},
title = {A Memory Built-In Peer-Repair Architecture for Mesh-Connected Processor
Array},
booktitle = {2022 International Symposium on {VLSI} Design, Automation and Test,
{VLSI-DAT} 2022, Hsinchu, Taiwan, April 18-21, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSI-DAT54769.2022.9768060},
doi = {10.1109/VLSI-DAT54769.2022.9768060},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi-dat/TanTWLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/WangCW22,
author = {Hong{-}Hao Wang and
Po{-}Yao Chuang and
Cheng{-}Wen Wu},
title = {A Thermal Quorum Sensing Scheme for Enhancement of Integrated-Circuit
Reliability and Lifetime},
booktitle = {2022 International Symposium on {VLSI} Design, Automation and Test,
{VLSI-DAT} 2022, Hsinchu, Taiwan, April 18-21, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSI-DAT54769.2022.9768056},
doi = {10.1109/VLSI-DAT54769.2022.9768056},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/WangCW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/JianFWM21,
author = {Yu{-}Rong Jian and
Ferenc Fodor and
Cheng{-}Wen Wu and
Erik Jan Marinissen},
title = {Automated Probe-Mark Analysis for Advanced Probe Technology Characterization},
journal = {{IEEE} Des. Test},
volume = {38},
number = {5},
pages = {82--89},
year = {2021},
url = {https://doi.org/10.1109/MDAT.2020.3034043},
doi = {10.1109/MDAT.2020.3034043},
timestamp = {Tue, 05 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/JianFWM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TanWL21,
author = {Pai{-}Yu Tan and
Cheng{-}Wen Wu and
Juin{-}Ming Lu},
title = {An Improved {STBP} for Training High-Accuracy and Low-Spike-Count
Spiking Neural Networks},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {575--580},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474151},
doi = {10.23919/DATE51398.2021.9474151},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/TanWL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChuangTWL20,
author = {Po{-}Yao Chuang and
Pai{-}Yu Tan and
Cheng{-}Wen Wu and
Juin{-}Ming Lu},
title = {A 90nm 103.14 {TOPS/W} Binary-Weight Spiking Neural Network {CMOS}
{ASIC} for Real-Time Object Classification},
booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
CA, USA, July 20-24, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DAC18072.2020.9218714},
doi = {10.1109/DAC18072.2020.9218714},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChuangTWL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/HuGMSHGWM20,
author = {Min{-}Chun Hu and
Zhan Gao and
Santosh Malagi and
Joe Swenton and
Jos Huisken and
Kees Goossens and
Cheng{-}Wen Wu and
Erik Jan Marinissen},
title = {Tightening the Mesh Size of the Cell-Aware {ATPG} Net for Catching
All Detectable Weakest Faults},
booktitle = {{IEEE} European Test Symposium, {ETS} 2020, Tallinn, Estonia, May
25-29, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ETS48528.2020.9131567},
doi = {10.1109/ETS48528.2020.9131567},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/HuGMSHGWM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChuangHWLTCW20,
author = {Chien{-}Hui Chuang and
Kuan{-}Wei Hou and
Cheng{-}Wen Wu and
Mincent Lee and
Chia{-}Heng Tsai and
Hao Chen and
Min{-}Jer Wang},
title = {A Deep Learning-Based Screening Method for Improving the Quality and
Reliability of Integrated Passive Devices},
booktitle = {{IEEE} International Test Conference, {ITC} 2020, Washington, DC,
USA, November 1-6, 2020},
pages = {1--9},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ITC44778.2020.9325221},
doi = {10.1109/ITC44778.2020.9325221},
timestamp = {Wed, 26 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/ChuangHWLTCW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/ChuangHWLTCW20,
author = {Chien{-}Hui Chuang and
Kuan{-}Wei Hou and
Cheng{-}Wen Wu and
Mincent Lee and
Chia{-}Heng Tsai and
Hao Chen and
Min{-}Jer Wang},
title = {A Deep Learning-Based Screening Method for Improving the Quality and
Reliability of Integrated Passive Devices},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2020, Taipei,
Taiwan, September 23-25, 2020},
pages = {13--18},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ITC-Asia51099.2020.00014},
doi = {10.1109/ITC-ASIA51099.2020.00014},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc-asia/ChuangHWLTCW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2003-06310,
author = {Pai{-}Yu Tan and
Po{-}Yao Chuang and
Yen{-}Ting Lin and
Cheng{-}Wen Wu and
Juin{-}Ming Lu},
title = {A Power-Efficient Binary-Weight Spiking Neural Network Architecture
for Real-Time Object Classification},
journal = {CoRR},
volume = {abs/2003.06310},
year = {2020},
url = {https://arxiv.org/abs/2003.06310},
eprinttype = {arXiv},
eprint = {2003.06310},
timestamp = {Tue, 17 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2003-06310.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Wu19,
author = {Cheng{-}Wen Wu},
title = {The Last Byte: Baseball and Testing},
journal = {{IEEE} Des. Test},
volume = {36},
number = {6},
pages = {88},
year = {2019},
url = {https://doi.org/10.1109/MDAT.2019.2942354},
doi = {10.1109/MDAT.2019.2942354},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/Wu19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/InoueLW19,
author = {Michiko Inoue and
Xiaowei Li and
Cheng{-}Wen Wu},
title = {Asian Test Symposium - Past, Present and Future -},
booktitle = {{IEEE} International Test Conference, {ITC} 2019, Washington, DC,
USA, November 9-15, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ITC44170.2019.9000151},
doi = {10.1109/ITC44170.2019.9000151},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/InoueLW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/KaoW18,
author = {Ying{-}Cih Kao and
Cheng{-}Wen Wu},
editor = {Michael B. Matthews},
title = {A Self-Organizing Map-Based Adaptive Traffic Light Control System
with Reinforcement Learning},
booktitle = {52nd Asilomar Conference on Signals, Systems, and Computers, {ACSSC}
2018, Pacific Grove, CA, USA, October 28-31, 2018},
pages = {2060--2064},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ACSSC.2018.8645125},
doi = {10.1109/ACSSC.2018.8645125},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/acssc/KaoW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChenWW18,
author = {Meng{-}Chi Chen and
Tsung{-}Hsuan Wu and
Cheng{-}Wen Wu},
title = {A Built-in Self-Test Scheme for Detecting Defects in FinFET-Based
{SRAM} Circuit},
booktitle = {27th {IEEE} Asian Test Symposium, {ATS} 2018, Hefei, China, October
15-18, 2018},
pages = {19--24},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ATS.2018.00015},
doi = {10.1109/ATS.2018.00015},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChenWW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ChuangWC18,
author = {Po{-}Yao Chuang and
Cheng{-}Wen Wu and
Harry H. Chen},
title = {Covering hard-to-detect defects by thermal quorum sensing},
booktitle = {23rd {IEEE} European Test Symposium, {ETS} 2018, Bremen, Germany,
May 28 - June 1, 2018},
pages = {1--2},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ETS.2018.8400705},
doi = {10.1109/ETS.2018.8400705},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/ChuangWC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isie/KuoW18,
author = {Su{-}Fu Kuo and
Cheng{-}Wen Wu},
title = {Symbiotic Controller Design Using a Memory-Based {FSM} Model},
booktitle = {27th {IEEE} International Symposium on Industrial Electronics, {ISIE}
2018, Cairns, Australia, June 13-15, 2018},
pages = {874--879},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISIE.2018.8433783},
doi = {10.1109/ISIE.2018.8433783},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isie/KuoW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MarinissenFPSJW18,
author = {Erik Jan Marinissen and
Ferenc Fodor and
Arnita Podpod and
Michele Stucchi and
Yu{-}Rong Jian and
Cheng{-}Wen Wu},
title = {Solutions to Multiple Probing Challenges for Test Access to Multi-Die
Stacked Integrated Circuits},
booktitle = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
October 29 - Nov. 1, 2018},
pages = {1--10},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/TEST.2018.8624731},
doi = {10.1109/TEST.2018.8624731},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MarinissenFPSJW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/HuHLCW18,
author = {Jia{-}Yun Hu and
Kuan{-}Wei Hou and
Chih{-}Yen Lo and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {RRAM-Based Neuromorphic Hardware Reliability Improvement by Self-Healing
and Error Correction},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2018, Harbin,
China, August 15-17, 2018},
pages = {19--24},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ITC-Asia.2018.00014},
doi = {10.1109/ITC-ASIA.2018.00014},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc-asia/HuHLCW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/LiuSLW17,
author = {Zhi{-}Yong Liu and
Hsiu{-}Chuan Shih and
Bing{-}Yang Lin and
Cheng{-}Wen Wu},
title = {Controller Architecture for Low-Power, Low-Latency {DRAM} With Built-in
Cache},
journal = {{IEEE} Des. Test},
volume = {34},
number = {2},
pages = {69--78},
year = {2017},
url = {https://doi.org/10.1109/MDAT.2016.2524445},
doi = {10.1109/MDAT.2016.2524445},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/LiuSLW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/WangLWLCLPW17,
author = {Kai{-}Li Wang and
Bing{-}Yang Lin and
Cheng{-}Wen Wu and
Mincent Lee and
Hao Chen and
Hung{-}Chih Lin and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package},
journal = {{IEEE} Des. Test},
volume = {34},
number = {3},
pages = {50--58},
year = {2017},
url = {https://doi.org/10.1109/MDAT.2016.2562060},
doi = {10.1109/MDAT.2016.2562060},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/WangLWLCLPW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LiuLWCLLPW17,
author = {Hsuan{-}Hung Liu and
Bing{-}Yang Lin and
Cheng{-}Wen Wu and
Wan{-}Ting Chiang and
Mincent Lee and
Hung{-}Chih Lin and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {A Built-Off Self-Repair Scheme for Channel-Based 3D Memories},
journal = {{IEEE} Trans. Computers},
volume = {66},
number = {8},
pages = {1293--1301},
year = {2017},
url = {https://doi.org/10.1109/TC.2017.2667645},
doi = {10.1109/TC.2017.2667645},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LiuLWCLLPW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LawWLH17,
author = {Pok Man Preston Law and
Cheng{-}Wen Wu and
Long{-}Yi Lin and
Hao{-}Chiao Hong},
title = {An Enhanced Boundary Scan Architecture for Inter-Die Interconnect
Leakage Measurement in 2.5D and 3D Packages},
booktitle = {26th {IEEE} Asian Test Symposium, {ATS} 2017, Taipei City, Taiwan,
November 27-30, 2017},
pages = {5--10},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ATS.2017.14},
doi = {10.1109/ATS.2017.14},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/LawWLH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LinHTCW17,
author = {Bing{-}Yang Lin and
Hsin{-}Wei Hung and
Shu{-}Mei Tseng and
Chi Chen and
Cheng{-}Wen Wu},
title = {Highly reliable and low-cost symbiotic {IOT} devices and systems},
booktitle = {{IEEE} International Test Conference, {ITC} 2017, Fort Worth, TX,
USA, October 31 - Nov. 2, 2017},
pages = {1--10},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/TEST.2017.8242076},
doi = {10.1109/TEST.2017.8242076},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/LinHTCW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/ChuangWC17,
author = {Po{-}Yao Chuang and
Cheng{-}Wen Wu and
Harry H. Chen},
title = {Cell-aware test generation time reduction by using switch-level {ATPG}},
booktitle = {International Test Conference in Asia, ITC-Asia 2017, Taipei, Taiwan,
September 13-15, 2017},
pages = {27--32},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ITC-ASIA.2017.8097105},
doi = {10.1109/ITC-ASIA.2017.8097105},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc-asia/ChuangWC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/WuLHTC17,
author = {Cheng{-}Wen Wu and
Bing{-}Yang Lin and
Hsin{-}Wei Hung and
Shu{-}Mei Tseng and
Chi Chen},
title = {Symbiotic system models for efficient {IGT} system design and test},
booktitle = {International Test Conference in Asia, ITC-Asia 2017, Taipei, Taiwan,
September 13-15, 2017},
pages = {71--76},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ITC-ASIA.2017.8097114},
doi = {10.1109/ITC-ASIA.2017.8097114},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc-asia/WuLHTC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/Wu17,
author = {Cheng{-}Wen Wu},
title = {Can {IOT} make semiconductor great again?},
booktitle = {2017 International Symposium on {VLSI} Design, Automation and Test,
{VLSI-DAT} 2017, Hsinchu, Taiwan, April 24-27, 2017},
pages = {1},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/VLSI-DAT.2017.7939684},
doi = {10.1109/VLSI-DAT.2017.7939684},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/Wu17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/LinCWLLPW16,
author = {Bing{-}Yang Lin and
Wan{-}Ting Chiang and
Cheng{-}Wen Wu and
Mincent Lee and
Hung{-}Chih Lin and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {Configurable Cubical Redundancy Schemes for Channel-Based 3-D {DRAM}
Yield Improvement},
journal = {{IEEE} Des. Test},
volume = {33},
number = {2},
pages = {30--39},
year = {2016},
url = {https://doi.org/10.1109/MDAT.2015.2455347},
doi = {10.1109/MDAT.2015.2455347},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/LinCWLLPW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LinWLLPW16,
author = {Bing{-}Yang Lin and
Cheng{-}Wen Wu and
Mincent Lee and
Hung{-}Chih Lin and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {A Local Parallel Search Approach for Memory Failure Pattern Identification},
journal = {{IEEE} Trans. Computers},
volume = {65},
number = {3},
pages = {770--780},
year = {2016},
url = {https://doi.org/10.1109/TC.2015.2462820},
doi = {10.1109/TC.2015.2462820},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LinWLLPW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LiuLW16,
author = {Hsuan{-}Wei Liu and
Bing{-}Yang Lin and
Cheng{-}Wen Wu},
title = {Layout-Oriented Defect Set Reduction for Fast Circuit Simulation in
Cell-Aware Test},
booktitle = {25th {IEEE} Asian Test Symposium, {ATS} 2016, Hiroshima, Japan, November
21-24, 2016},
pages = {156--160},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ATS.2016.25},
doi = {10.1109/ATS.2016.25},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/LiuLW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChenCCW16,
author = {Harry H. Chen and
Simon Y.{-}H. Chen and
Po{-}Yao Chuang and
Cheng{-}Wen Wu},
title = {Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation},
booktitle = {25th {IEEE} Asian Test Symposium, {ATS} 2016, Hiroshima, Japan, November
21-24, 2016},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ATS.2016.33},
doi = {10.1109/ATS.2016.33},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChenCCW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HuangLWLCLPW16,
author = {Yu{-}Chieh Huang and
Bing{-}Yang Lin and
Cheng{-}Wen Wu and
Mincent Lee and
Hao Chen and
Hung{-}Chih Lin and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {Efficient probing schemes for fine-pitch pads of InFO wafer-level
chip-scale package},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {58:1--58:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2898015},
doi = {10.1145/2897937.2898015},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/HuangLWLCLPW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/WeiLW16,
author = {Sin{-}Yu Wei and
Bing{-}Yang Lin and
Cheng{-}Wen Wu},
title = {A fast sweep-line-based failure pattern extractor for memory diagnosis},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519314},
doi = {10.1109/ETS.2016.7519314},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/WeiLW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/Wu16,
author = {Cheng{-}Wen Wu},
title = {Is IoT coming to the rescue of semiconductor?},
booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands,
May 23-27, 2016},
pages = {1},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ETS.2016.7519304},
doi = {10.1109/ETS.2016.7519304},
timestamp = {Mon, 22 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/Wu16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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author = {Wei{-}Chung Cheng and
I{-}Fang Chung and
Cheng{-}Fong Tsai and
Tse{-}Shun Huang and
Chen{-}Yang Chen and
Shao{-}Chuan Wang and
Ting{-}Yu Chang and
Hsing{-}Jen Sun and
Jeffrey Yung{-}Chuan Chao and
Cheng{-}Chung Cheng and
Cheng{-}Wen Wu and
Hsei{-}Wei Wang},
title = {YM500v2: a small {RNA} sequencing (smRNA-seq) database for human cancer
miRNome research},
journal = {Nucleic Acids Res.},
volume = {43},
number = {Database-Issue},
pages = {862--867},
year = {2015},
url = {https://doi.org/10.1093/nar/gku1156},
doi = {10.1093/NAR/GKU1156},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/nar/ChengCTHCWCSCCWW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/LinWC15,
author = {Bing{-}Yang Lin and
Cheng{-}Wen Wu and
Harry H. Chen},
title = {System-level test coverage prediction by structural stress test data
mining},
booktitle = {{VLSI} Design, Automation and Test, {VLSI-DAT} 2015, Hsinchu, Taiwan,
April 27-29, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSI-DAT.2015.7114508},
doi = {10.1109/VLSI-DAT.2015.7114508},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/LinWC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LuoCSWSLLLLLCSK15,
author = {Pei{-}Wen Luo and
Chi{-}Kang Chen and
Yu{-}Hui Sung and
Wei Wu and
Hsiu{-}Chuan Shih and
Chia{-}Hsin Lee and
Kuo{-}Hua Lee and
Ming{-}Wei Li and
Mei{-}Chiang Lung and
Chun{-}Nan Lu and
Yung{-}Fa Chou and
Po{-}Lin Shih and
Chung{-}Hu Ke and
Chun Shiah and
Patrick Stolt and
Shigeki Tomishima and
Ding{-}Ming Kwai and
Bor{-}Doou Rong and
Nicky Lu and
Shih{-}Lien Lu and
Cheng{-}Wen Wu},
title = {A computer designed half Gb 16-channel 819Gb/s high-bandwidth and
10ns low-latency {DRAM} for 3D stacked memory devices using TSVs},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19,
2015},
pages = {186},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSIC.2015.7231256},
doi = {10.1109/VLSIC.2015.7231256},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LuoCSWSLLLLLCSK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ChiLWWLP14,
author = {Chun{-}Chuan Chi and
Bing{-}Yang Lin and
Cheng{-}Wen Wu and
Min{-}Jer Wang and
Hung{-}Chih Lin and
Ching{-}Nen Peng},
title = {On Improving Interconnect Defect Diagnosis Resolution and Yield for
Interposer-Based 3-D ICs},
journal = {{IEEE} Des. Test},
volume = {31},
number = {4},
pages = {16--26},
year = {2014},
url = {https://doi.org/10.1109/MDAT.2014.2304437},
doi = {10.1109/MDAT.2014.2304437},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/ChiLWWLP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShihLYLKLSW14,
author = {Hsiu{-}Chuan Shih and
Pei{-}Wen Luo and
Jen{-}Chieh Yeh and
Shu{-}Yen Lin and
Ding{-}Ming Kwai and
Shih{-}Lien Lu and
Andre Schaefer and
Cheng{-}Wen Wu},
title = {DArT: {A} Component-Based {DRAM} Area, Power, and Timing Modeling
Tool},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {33},
number = {9},
pages = {1356--1369},
year = {2014},
url = {https://doi.org/10.1109/TCAD.2014.2323203},
doi = {10.1109/TCAD.2014.2323203},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShihLYLKLSW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/PengKCW14,
author = {Yen{-}Lin Peng and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {Application-Independent Testing of 3-D Field Programmable Gate Array
Interconnect Faults},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {2},
pages = {207--219},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2242100},
doi = {10.1109/TVLSI.2013.2242100},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/PengKCW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChiMGW14,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
title = {Low-Cost Post-Bond Testing of 3-D ICs Containing a Passive Silicon
Interposer Base},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {11},
pages = {2388--2401},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2293192},
doi = {10.1109/TVLSI.2013.2293192},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChiMGW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/YouYLLCLKCW14,
author = {Yun{-}Chao You and
Chi{-}Chun Yang and
Jin{-}Fu Li and
Chih{-}Yen Lo and
Chao{-}Hsun Chen and
Jenn{-}Shiang Lai and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {BIST-Assisted Tuning Scheme for Minimizing IO-Channel Power of TSV-Based
3D DRAMs},
booktitle = {23rd {IEEE} Asian Test Symposium, {ATS} 2014, Hangzhou, China, November
16-19, 2014},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ATS.2014.13},
doi = {10.1109/ATS.2014.13},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/YouYLLCLKCW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LinCWLLPW14,
author = {Bing{-}Yang Lin and
Wan{-}Ting Chiang and
Cheng{-}Wen Wu and
Mincent Lee and
Hung{-}Chih Lin and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {Redundancy architectures for channel-based 3D {DRAM} yield improvement},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035331},
doi = {10.1109/TEST.2014.7035331},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/LinCWLLPW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChenSCW13,
author = {Po{-}Yuan Chen and
Chin{-}Lung Su and
Chao{-}Hsun Chen and
Cheng{-}Wen Wu},
title = {Generalization of an Enhanced {ECC} Methodology for Low Power {PSRAM}},
journal = {{IEEE} Trans. Computers},
volume = {62},
number = {7},
pages = {1318--1331},
year = {2013},
url = {https://doi.org/10.1109/TC.2012.98},
doi = {10.1109/TC.2012.98},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChenSCW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ChouKSW13,
author = {Yung{-}Fa Chou and
Ding{-}Ming Kwai and
Ming{-}Der Shieh and
Cheng{-}Wen Wu},
title = {Reactivation of Spares for Off-Chip Memory Repair After Die Stacking
in a 3-D {IC} With TSVs},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {60-I},
number = {9},
pages = {2343--2351},
year = {2013},
url = {https://doi.org/10.1109/TCSI.2013.2246235},
doi = {10.1109/TCSI.2013.2246235},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ChouKSW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiHHTHLMHBTWW13,
author = {Tsung{-}Yeh Li and
Shi{-}Yu Huang and
Hsuan{-}Jung Hsu and
Chao{-}Wen Tzeng and
Chih{-}Tsun Huang and
Jing{-}Jia Liou and
Hsi{-}Pin Ma and
Po{-}Chiun Huang and
Jenn{-}Chyou Bor and
Ching{-}Cheng Tien and
Chi{-}Hu Wang and
Cheng{-}Wen Wu},
title = {AC-Plus Scan Methodology for Small Delay Testing and Characterization},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {2},
pages = {329--341},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2187223},
doi = {10.1109/TVLSI.2012.2187223},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LiHHTHLMHBTWW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/YouHLTKCW13,
author = {Jhih{-}Wei You and
Shi{-}Yu Huang and
Yu{-}Hsiang Lin and
Meng{-}Hsiu Tsai and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {In-Situ Method for {TSV} Delay Testing and Characterization Using
Input Sensitivity Analysis},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {3},
pages = {443--453},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2187543},
doi = {10.1109/TVLSI.2012.2187543},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/YouHLTKCW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChangHKCW13,
author = {Hsiu{-}Ming Chang and
Jiun{-}Lang Huang and
Ding{-}Ming Kwai and
Kwang{-}Ting Cheng and
Cheng{-}Wen Wu},
title = {Low-Cost Error Tolerance Scheme for 3-D {CMOS} Imagers},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {3},
pages = {465--474},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2190148},
doi = {10.1109/TVLSI.2012.2190148},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ChangHKCW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChenWW13,
author = {Ching{-}Yi Chen and
Sheng{-}Hung Wang and
Cheng{-}Wen Wu},
title = {Write Current Self-Configuration Scheme for {MRAM} Yield Improvement},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {7},
pages = {1260--1270},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2207136},
doi = {10.1109/TVLSI.2012.2207136},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ChenWW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChenHSYW13,
author = {Shin{-}Shiun Chen and
Chun{-}Kai Hsu and
Hsiu{-}Chuan Shih and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu},
title = {Processor and {DRAM} integration by TSV-based 3-D stacking for power-aware
SOCs},
booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2013, Yokohama, Japan, January 22-25, 2013},
pages = {429--434},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASPDAC.2013.6509634},
doi = {10.1109/ASPDAC.2013.6509634},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChenHSYW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LinLW13,
author = {Bing{-}Yang Lin and
Mincent Lee and
Cheng{-}Wen Wu},
title = {Exploration Methodology for 3D Memory Redundancy Architectures under
Redundancy Constraints},
booktitle = {22nd Asian Test Symposium, {ATS} 2013, Yilan County, Taiwan, November
18-21, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ATS.2013.11},
doi = {10.1109/ATS.2013.11},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/LinLW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShihW13,
author = {Hsiu{-}Chuan Shih and
Cheng{-}Wen Wu},
editor = {Enrico Macii},
title = {An enhanced double-TSV scheme for defect tolerance in 3D-IC},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1486--1489},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.302},
doi = {10.7873/DATE.2013.302},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ShihW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/Wu13,
author = {Cheng{-}Wen Wu},
editor = {Pai H. Chou and
Ru Huang and
Yuan Xie and
Tanay Karnik},
title = {Holistic approach to low-power system design},
booktitle = {International Symposium on Low Power Electronics and Design (ISLPED),
Beijing, China, September 4-6, 2013},
pages = {2},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISLPED.2013.6629257},
doi = {10.1109/ISLPED.2013.6629257},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/islped/Wu13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ShiyanovskiiPW13,
author = {Yuriy Shiyanovskii and
Christos A. Papachristou and
Cheng{-}Wen Wu},
title = {Analytical modeling and numerical simulations of temperature field
in TSV-based 3D ICs},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {24--29},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523585},
doi = {10.1109/ISQED.2013.6523585},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/ShiyanovskiiPW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LinCCCWSCLGCCCCSJIWW13,
author = {Tay{-}Jyi Lin and
Cheng{-}An Chien and
Pei{-}Yao Chang and
Ching{-}Wen Chen and
Po{-}Hao Wang and
Ting{-}Yu Shyu and
Chien{-}Yung Chou and
Shien{-}Chun Luo and
Jiun{-}In Guo and
Tien{-}Fu Chen and
Gene C. H. Chuang and
Yuan{-}Hua Chu and
Liang{-}Chia Cheng and
Hong{-}Men Su and
Chewnpu Jou and
Meikei Ieong and
Cheng{-}Wen Wu and
Jinn{-}Shyan Wang},
title = {A 0.48V 0.57nJ/pixel video-recording SoC in 65nm {CMOS}},
booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
17-21, 2013},
pages = {158--159},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSCC.2013.6487680},
doi = {10.1109/ISSCC.2013.6487680},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/LinCCCWSCLGCCCCSJIWW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/HouLLKCW13,
author = {Chih{-}Sheng Hou and
Jin{-}Fu Li and
Chih{-}Yen Lo and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {An FPGA-based test platform for analyzing data retention time distribution
of DRAMs},
booktitle = {2013 International Symposium on {VLSI} Design, Automation, and Test,
{VLSI-DAT} 2013, Hsinchu, Taiwan, April 22-24, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/VLDI-DAT.2013.6533853},
doi = {10.1109/VLDI-DAT.2013.6533853},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/HouLLKCW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChiWWL13,
author = {Chun{-}Chuan Chi and
Cheng{-}Wen Wu and
Min{-}Jer Wang and
Hung{-}Chih Lin},
title = {3D-IC interconnect test, diagnosis, and repair},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548905},
doi = {10.1109/VTS.2013.6548905},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChiWWL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiWWACK13,
author = {Jin{-}Fu Li and
Cheng{-}Wen Wu and
Masahiro Aoyagi and
Meng{-}Fan Marvin Chang and
Ding{-}Ming Kwai},
title = {Special session 4C: Hot topic 3D-IC design and test},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548900},
doi = {10.1109/VTS.2013.6548900},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LiWWACK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YouHCLLKCW13,
author = {Yun{-}Chao You and
Chih{-}Sheng Hou and
Li{-}Jung Chang and
Jin{-}Fu Li and
Chih{-}Yen Lo and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {A hybrid {ECC} and redundancy technique for reducing refresh power
of DRAMs},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548927},
doi = {10.1109/VTS.2013.6548927},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/YouHCLLKCW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WuLL12,
author = {Cheng{-}Wen Wu and
Shyue{-}Kung Lu and
Jin{-}Fu Li},
title = {On test and repair of 3D random access memory},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {744--749},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6165054},
doi = {10.1109/ASPDAC.2012.6165054},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WuLL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WuCLLWTLCPW12,
author = {Tze{-}Hsin Wu and
Po{-}Yuan Chen and
Mincent Lee and
Bin{-}Yen Lin and
Cheng{-}Wen Wu and
Chen{-}Hung Tien and
Hung{-}Chih Lin and
Hao Chen and
Ching{-}Nen Peng and
Min{-}Jer Wang},
title = {A memory yield improvement scheme combining built-in self-repair and
error correction codes},
booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA,
USA, November 5-8, 2012},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/TEST.2012.6401576},
doi = {10.1109/TEST.2012.6401576},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/WuCLLWTLCPW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YouCLLKCW12,
author = {Yun{-}Chao You and
Che{-}Wei Chou and
Jin{-}Fu Li and
Chih{-}Yen Lo and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {A built-in self-test scheme for 3D RAMs},
booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA,
USA, November 5-8, 2012},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/TEST.2012.6401579},
doi = {10.1109/TEST.2012.6401579},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/YouCLLKCW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/ChiCKHWHDL12,
author = {Chun{-}Chuan Chi and
Yung{-}Fa Chou and
Ding{-}Ming Kwai and
Yu{-}Ying Hsiao and
Cheng{-}Wen Wu and
Yu{-}Tsao Hsing and
Li{-}Ming Denq and
Tsung{-}Hsiang Lin},
title = {3D-IC {BISR} for stacked memories using cross-die spares},
booktitle = {Proceedings of Technical Program of 2012 {VLSI} Design, Automation
and Test, {VLSI-DAT} 2012, Hsinchu, Taiwan, April 23-25, 2012},
pages = {1--4},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSI-DAT.2012.6212621},
doi = {10.1109/VLSI-DAT.2012.6212621},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/ChiCKHWHDL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChouCLW12,
author = {Ying{-}Wen Chou and
Po{-}Yuan Chen and
Mincent Lee and
Cheng{-}Wen Wu},
title = {Cost modeling and analysis for interposer-based three-dimensional
{IC}},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {108--113},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231088},
doi = {10.1109/VTS.2012.6231088},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChouCLW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LinLW12,
author = {Bing{-}Yang Lin and
Mincent Lee and
Cheng{-}Wen Wu},
title = {A Memory Failure Pattern Analyzer for memory diagnosis and repair},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {234--239},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231059},
doi = {10.1109/VTS.2012.6231059},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LinLW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeDW11,
author = {Mincent Lee and
Li{-}Ming Denq and
Cheng{-}Wen Wu},
title = {A Memory Built-In Self-Repair Scheme Based on Configurable Spares},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {6},
pages = {919--929},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2011.2106812},
doi = {10.1109/TCAD.2011.2106812},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeDW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChouKW11,
author = {Yung{-}Fa Chou and
Ding{-}Ming Kwai and
Cheng{-}Wen Wu},
title = {Yield Enhancement by Bad-Die Recycling and Stacking With Though-Silicon
Vias},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {8},
pages = {1346--1356},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2051466},
doi = {10.1109/TVLSI.2010.2051466},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ChouKW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SuHWLW11,
author = {Chin{-}Lung Su and
Rei{-}Fu Huang and
Cheng{-}Wen Wu and
Kun{-}Lun Luo and
Wen Ching Wu},
title = {A Built-in Self-Diagnosis and Repair Design With Fail Pattern Identification
for Memories},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {12},
pages = {2184--2194},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2073489},
doi = {10.1109/TVLSI.2010.2073489},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/SuHWLW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HuangKCHCLKW11,
author = {Xuan{-}Lun Huang and
Ping{-}Ying Kang and
Hsiu{-}Ming Chang and
Jiun{-}Lang Huang and
Yung{-}Fa Chou and
Yung{-}Pin Lee and
Ding{-}Ming Kwai and
Cheng{-}Wen Wu},
title = {A self-testing and calibration method for embedded successive approximation
register {ADC}},
booktitle = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
pages = {713--718},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASPDAC.2011.5722279},
doi = {10.1109/ASPDAC.2011.5722279},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HuangKCHCLKW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChiMGW11,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
title = {Multi-visit TAMs to Reduce the Post-Bond Test Length of 2.5D-SICs
with a Passive Silicon Interposer Base},
booktitle = {Proceedings of the 20th {IEEE} Asian Test Symposium, {ATS} 2011, New
Delhi, India, November 20-23, 2011},
pages = {451--456},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ATS.2011.36},
doi = {10.1109/ATS.2011.36},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChiMGW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LiLWCDCHCLHHMBWTWKHC11,
author = {Chin{-}Fu Li and
Chi{-}Ying Lee and
Chen{-}Hsing Wang and
Shu{-}Lin Chang and
Li{-}Ming Denq and
Chun{-}Chuan Chi and
Hsuan{-}Jung Hsu and
Ming{-}Yi Chu and
Jing{-}Jia Liou and
Shi{-}Yu Huang and
Po{-}Chiun Huang and
Hsi{-}Pin Ma and
Jenn{-}Chyou Bor and
Cheng{-}Wen Wu and
Ching{-}Cheng Tien and
Chi{-}Hu Wang and
Yung{-}Sheng Kuo and
Chih{-}Tsun Huang and
Tien{-}Yu Chang},
editor = {Leon Stok and
Nikil D. Dutt and
Soha Hassoun},
title = {A low-cost wireless interface with no external antenna and crystal
oscillator for cm-range contactless testing},
booktitle = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
San Diego, California, USA, June 5-10, 2011},
pages = {771--776},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2024724.2024897},
doi = {10.1145/2024724.2024897},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LiLWCDCHCLHHMBWTWKHC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ChiMGW11,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
title = {DfT Architecture for 3D-SICs with Multiple Towers},
booktitle = {16th European Test Symposium, {ETS} 2011, Trondheim, Norway, May 23-27,
2011},
pages = {51--56},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ETS.2011.52},
doi = {10.1109/ETS.2011.52},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/ChiMGW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChiMGW11,
author = {Chun{-}Chuan Chi and
Erik Jan Marinissen and
Sandeep Kumar Goel and
Cheng{-}Wen Wu},
editor = {Bill Eklow and
R. D. (Shawn) Blanton},
title = {Post-bond testing of 2.5D-SICs and 3D-SICs containing a passive silicon
interposer base},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2011, Anaheim, CA,
USA, September 20-22, 2011},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/TEST.2011.6139181},
doi = {10.1109/TEST.2011.6139181},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChiMGW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HuangLCKCW11,
author = {Yu{-}Jen Huang and
Jin{-}Fu Li and
Ji{-}Jan Chen and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {A built-in self-test scheme for the post-bond test of TSVs in 3D ICs},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {20--25},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783749},
doi = {10.1109/VTS.2011.5783749},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/HuangLCKCW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShihCWLS11,
author = {Hsiu{-}Chuan Shih and
Ching{-}Yi Chen and
Cheng{-}Wen Wu and
Chih{-}He Lin and
Shyh{-}Shyuan Sheu},
title = {Training-based forming process for {RRAM} yield improvement},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {146--151},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783775},
doi = {10.1109/VTS.2011.5783775},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ShihCWLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Wu11,
author = {Cheng{-}Wen Wu},
title = {Special session: Hot topic design and test of 3D and emerging memories},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {328},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783744},
doi = {10.1109/VTS.2011.5783744},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Wu11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/HsingDCW10,
author = {Yu{-}Tsao Hsing and
Li{-}Ming Denq and
Chao{-}Hsun Chen and
Cheng{-}Wen Wu},
title = {Economic Analysis of the {HOY} Wireless Test Methodology},
journal = {{IEEE} Des. Test Comput.},
volume = {27},
number = {3},
pages = {20--30},
year = {2010},
url = {https://doi.org/10.1109/MDT.2009.96},
doi = {10.1109/MDT.2009.96},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HsingDCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HsiaoCW10,
author = {Yu{-}Ying Hsiao and
Chao{-}Hsun Chen and
Cheng{-}Wen Wu},
title = {Built-In Self-Repair Schemes for Flash Memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {8},
pages = {1243--1256},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2010.2049051},
doi = {10.1109/TCAD.2010.2049051},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HsiaoCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LoHDW10,
author = {Chih{-}Yen Lo and
Yu{-}Tsao Hsing and
Li{-}Ming Denq and
Cheng{-}Wen Wu},
title = {{SOC} Test Architecture and Method for 3-D ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {10},
pages = {1645--1649},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2010.2051732},
doi = {10.1109/TCAD.2010.2051732},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LoHDW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LuYHW10,
author = {Shyue{-}Kung Lu and
Chun{-}Lin Yang and
Yuang{-}Cheng Hsiao and
Cheng{-}Wen Wu},
title = {Efficient {BISR} Techniques for Embedded Memories Considering Cluster
Faults},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {2},
pages = {184--193},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2008.2008996},
doi = {10.1109/TVLSI.2008.2008996},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LuYHW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WangSHWH10,
author = {Mao{-}Yin Wang and
Chih{-}Pin Su and
Chia{-}Lung Horng and
Cheng{-}Wen Wu and
Chih{-}Tsun Huang},
title = {Single- and Multi-core Configurable {AES} Architectures for Flexible
Security},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {4},
pages = {541--552},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2013231},
doi = {10.1109/TVLSI.2009.2013231},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/WangSHWH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WangCW10,
author = {Chen{-}Hsing Wang and
Chieh{-}Lin Chuang and
Cheng{-}Wen Wu},
title = {An Efficient Multimode Multiplier Supporting {AES} and Fundamental
Operations of Public-Key Cryptosystems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {4},
pages = {553--563},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2013958},
doi = {10.1109/TVLSI.2009.2013958},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/WangCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WangW10a,
author = {Mao{-}Yin Wang and
Cheng{-}Wen Wu},
title = {A Mesh-Structured Scalable IPsec Processor},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {5},
pages = {725--731},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2016102},
doi = {10.1109/TVLSI.2009.2016102},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/WangW10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SuTCLWCWHK10,
author = {Chin{-}Lung Su and
Chih{-}Wea Tsai and
Ching{-}Yi Chen and
Wan{-}Yu Lo and
Cheng{-}Wen Wu and
Ji{-}Jan Chen and
Wen Ching Wu and
Chien{-}Chung Hung and
Ming{-}Jer Kao},
title = {Diagnosis of {MRAM} Write Disturbance Fault},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {12},
pages = {1762--1766},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2026905},
doi = {10.1109/TVLSI.2009.2026905},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/SuTCLWCWHK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LiW10,
author = {Jin{-}Fu Li and
Cheng{-}Wen Wu},
title = {Is 3D integration an opportunity or just a hype?},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {541--543},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419826},
doi = {10.1109/ASPDAC.2010.5419826},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LiW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChouLCKCW10,
author = {Che{-}Wei Chou and
Jin{-}Fu Li and
Ji{-}Jan Chen and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {A Test Integration Methodology for 3D Integrated Circuits},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {377--382},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.71},
doi = {10.1109/ATS.2010.71},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChouLCKCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/YouHKCW10,
author = {Jhih{-}Wei You and
Shi{-}Yu Huang and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {Performance Characterization of {TSV} in 3D {IC} via Sensitivity Analysis},
booktitle = {Proceedings of the 19th {IEEE} Asian Test Symposium, {ATS} 2010, 1-4
December 2010, Shanghai, China},
pages = {389--394},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ATS.2010.73},
doi = {10.1109/ATS.2010.73},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/YouHKCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChangHKCW10,
author = {Hsiu{-}Ming Chang and
Jiun{-}Lang Huang and
Ding{-}Ming Kwai and
Kwang{-}Ting (Tim) Cheng and
Cheng{-}Wen Wu},
editor = {Sachin S. Sapatnekar},
title = {An error tolerance scheme for 3D {CMOS} imagers},
booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
Anaheim, California, USA, July 13-18, 2010},
pages = {917--922},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1837274.1837505},
doi = {10.1145/1837274.1837505},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/ChangHKCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WangCW10,
author = {Sheng{-}Hung Wang and
Ching{-}Yi Chen and
Cheng{-}Wen Wu},
editor = {Sachin S. Sapatnekar},
title = {Fast identification of operating current for toggle {MRAM} by spiral
search},
booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
Anaheim, California, USA, July 13-18, 2010},
pages = {923--928},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1837274.1837506},
doi = {10.1145/1837274.1837506},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WangCW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChenW10,
author = {Ching{-}Yi Chen and
Cheng{-}Wen Wu},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {An adaptive code rate {EDAC} scheme for random access memory},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {735--740},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5456955},
doi = {10.1109/DATE.2010.5456955},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/ChenW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LiHHTHLMHBWTW10,
author = {Tsung{-}Yeh Li and
Shi{-}Yu Huang and
Hsuan{-}Jung Hsu and
Chao{-}Wen Tzeng and
Chih{-}Tsun Huang and
Jing{-}Jia Liou and
Hsi{-}Pin Ma and
Po{-}Chiun Huang and
Jenn{-}Chyou Bor and
Cheng{-}Wen Wu and
Ching{-}Cheng Tien and
Mike Wang},
title = {AF-Test: Adaptive-Frequency Scan Test Methodology for Small-Delay
Defects},
booktitle = {25th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2010, Kyoto, Japan, October 6-8, 2010},
pages = {340--348},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DFT.2010.48},
doi = {10.1109/DFT.2010.48},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/LiHHTHLMHBWTW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ChiWL10,
author = {Chun{-}Chuan Chi and
Cheng{-}Wen Wu and
Jin{-}Fu Li},
title = {A low-cost and scalable test architecture for multi-core chips},
booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic,
May 24-28, 2010},
pages = {30--35},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ETSYM.2010.5512784},
doi = {10.1109/ETSYM.2010.5512784},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/ChiWL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenWK10,
author = {Po{-}Yuan Chen and
Cheng{-}Wen Wu and
Ding{-}Ming Kwai},
title = {On-chip testing of blind and open-sleeve TSVs for 3D {IC} before bonding},
booktitle = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
Santa Cruz, California, {USA}},
pages = {263--268},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VTS.2010.5469559},
doi = {10.1109/VTS.2010.5469559},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChenWK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/DenqHW09,
author = {Li{-}Ming Denq and
Yu{-}Tsao Hsing and
Cheng{-}Wen Wu},
title = {Hybrid {BIST} Scheme for Multiple Heterogeneous Embedded Memories},
journal = {{IEEE} Des. Test Comput.},
volume = {26},
number = {2},
pages = {64--73},
year = {2009},
url = {https://doi.org/10.1109/MDT.2009.37},
doi = {10.1109/MDT.2009.37},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/DenqHW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChiLKW09,
author = {Chun{-}Chuan Chi and
Chih{-}Yen Lo and
Te{-}Wen Ko and
Cheng{-}Wen Wu},
title = {Test Integration for {SOC} Supporting Very Low-Cost Testers},
booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26
November 2009, Taichung, Taiwan},
pages = {287--292},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ATS.2009.51},
doi = {10.1109/ATS.2009.51},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChiLKW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChenWK09,
author = {Po{-}Yuan Chen and
Cheng{-}Wen Wu and
Ding{-}Ming Kwai},
title = {On-Chip {TSV} Testing for 3D {IC} before Bonding Using Sense Amplification},
booktitle = {Proceedings of the Eighteentgh Asian Test Symposium, {ATS} 2009, 23-26
November 2009, Taichung, Taiwan},
pages = {450--455},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ATS.2009.42},
doi = {10.1109/ATS.2009.42},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChenWK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenHHW09,
author = {Te{-}Hsuan Chen and
Yu{-}Ying Hsiao and
Yu{-}Tsao Hsing and
Cheng{-}Wen Wu},
title = {An Adaptive-Rate Error Correction Scheme for {NAND} Flash Memory},
booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa
Cruz, California, {USA}},
pages = {53--58},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VTS.2009.24},
doi = {10.1109/VTS.2009.24},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChenHHW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/YehCWK08,
author = {Jen{-}Chieh Yeh and
Chao{-}Hsun Chen and
Cheng{-}Wen Wu and
Shuo{-}Fen Kuo},
title = {A Systematic Approach to Memory Test Time Reduction},
journal = {{IEEE} Des. Test Comput.},
volume = {25},
number = {6},
pages = {560--570},
year = {2008},
url = {https://doi.org/10.1109/MDT.2008.152},
doi = {10.1109/MDT.2008.152},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/YehCWK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SuTWHCWLK08,
author = {Chin{-}Lung Su and
Chih{-}Wea Tsai and
Cheng{-}Wen Wu and
Chien{-}Chung Hung and
Young{-}Shying Chen and
Ding{-}Yeong Wang and
Yuan{-}Jen Lee and
Ming{-}Jer Kao},
title = {Write Disturbance Modeling and Testing for {MRAM}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {16},
number = {3},
pages = {277--288},
year = {2008},
url = {https://doi.org/10.1109/TVLSI.2007.915402},
doi = {10.1109/TVLSI.2007.915402},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/SuTWHCWLK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HsuDWLHW08,
author = {Chun{-}Kai Hsu and
Li{-}Ming Denq and
Mao{-}Yin Wang and
Jing{-}Jia Liou and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {Area and Test Cost Reduction for On-Chip Wireless Test Channels with
System-Level Design Techniques},
booktitle = {17th {IEEE} Asian Test Symposium, {ATS} 2008, Sapporo, Japan, November
24-27, 2008},
pages = {245--250},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ATS.2008.19},
doi = {10.1109/ATS.2008.19},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/HsuDWLHW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LoCSW08,
author = {Wan{-}Yu Lo and
Ching{-}Yi Chen and
Chin{-}Lung Su and
Cheng{-}Wen Wu},
title = {Test and Diagnosis Algorithm Generation and Evaluation for {MRAM}
Write Disturbance Fault},
booktitle = {17th {IEEE} Asian Test Symposium, {ATS} 2008, Sapporo, Japan, November
24-27, 2008},
pages = {417--422},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ATS.2008.29},
doi = {10.1109/ATS.2008.29},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/LoCSW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/HuangCW07,
author = {Rei{-}Fu Huang and
Chao{-}Hsun Chen and
Cheng{-}Wen Wu},
title = {Economic Aspects of Memory Built-in Self-Repair},
journal = {{IEEE} Des. Test Comput.},
volume = {24},
number = {2},
pages = {164--172},
year = {2007},
url = {https://doi.org/10.1109/MDT.2007.41},
doi = {10.1109/MDT.2007.41},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HuangCW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/HuangLYW07,
author = {Rei{-}Fu Huang and
Jin{-}Fu Li and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu},
title = {Raisin: Redundancy Analysis Algorithm Simulation},
journal = {{IEEE} Des. Test Comput.},
volume = {24},
number = {4},
pages = {386--396},
year = {2007},
url = {https://doi.org/10.1109/MDT.2007.144},
doi = {10.1109/MDT.2007.144},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HuangLYW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/PengWLH07,
author = {Yen{-}Lin Peng and
Cheng{-}Wen Wu and
Jing{-}Jia Liou and
Chih{-}Tsun Huang},
title = {BIST-based diagnosis scheme for field programmable gate array interconnect
delay faults},
journal = {{IET} Comput. Digit. Tech.},
volume = {1},
number = {6},
pages = {716--723},
year = {2007},
url = {https://doi.org/10.1049/iet-cdt:20060197},
doi = {10.1049/IET-CDT:20060197},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/PengWLH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YehCCW07,
author = {Jen{-}Chieh Yeh and
Kuo{-}Liang Cheng and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test
Algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {6},
pages = {1101--1113},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2006.885828},
doi = {10.1109/TCAD.2006.885828},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YehCCW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LoWCHWWW07,
author = {Chih{-}Yen Lo and
Chen{-}Hsing Wang and
Kuo{-}Liang Cheng and
Jing{-}Reng Huang and
Chih{-}Wea Wang and
Shin{-}Moe Wang and
Cheng{-}Wen Wu},
title = {{STEAC:} {A} Platform for Automatic {SOC} Test Integration},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {15},
number = {5},
pages = {541--545},
year = {2007},
url = {https://doi.org/10.1109/TVLSI.2007.893662},
doi = {10.1109/TVLSI.2007.893662},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LoWCHWWW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChengAMMWW07,
author = {Jacob Abraham and
Salvador Mir and
Yinghua Min and
Jeremy Wang and
Cheng{-}Wen Wu},
title = {Test Education in the Global Economy},
booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
2007},
pages = {53},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ATS.2007.110},
doi = {10.1109/ATS.2007.110},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/ChengAMMWW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/DenqW07,
author = {Li{-}Ming Denq and
Cheng{-}Wen Wu},
title = {A Hybrid {BIST} Scheme for Multiple Heterogeneous Embedded Memories},
booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
2007},
pages = {349--354},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ATS.2007.12},
doi = {10.1109/ATS.2007.12},
timestamp = {Wed, 09 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/DenqW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WuLWW07,
author = {Hsiang{-}Huang Wu and
Jin{-}Fu Li and
Chi{-}Feng Wu and
Cheng{-}Wen Wu},
title = {{CAMEL:} An Efficient Fault Simulator with Coupling Fault Simulation
Enhancement for CAMs},
booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
2007},
pages = {355--360},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ATS.2007.27},
doi = {10.1109/ATS.2007.27},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/WuLWW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuTWCWHK07,
author = {Chin{-}Lung Su and
Chih{-}Wea Tsai and
Cheng{-}Wen Wu and
Ji{-}Jan Chen and
Wen Ching Wu and
Chien{-}Chung Hung and
Ming{-}Jer Kao},
editor = {Jill Sibert and
Janusz Rajski},
title = {Diagnosis for {MRAM} write disturbance fault},
booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara,
California, USA, October 21-26, 2007},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/TEST.2007.4437568},
doi = {10.1109/TEST.2007.4437568},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/SuTWCWHK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/LiouHWTWMCHDCLC07,
author = {Jing{-}Jia Liou and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Ching{-}Cheng Tien and
Chi{-}Hu Wang and
Hsi{-}Pin Ma and
Ying{-}Yen Chen and
Yueh{-}Chih Hsu and
Li{-}Ming Denq and
Chien{-}Jung Chiu and
Young{-}Wey Li and
Chieh{-}Ming Chang},
title = {A prototype of a wireless-based test system},
booktitle = {2007 {IEEE} International {SOC} Conference, Tampere, Finland, November
19-21, 2007},
pages = {225--228},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SOCC.2007.4545463},
doi = {10.1109/SOCC.2007.4545463},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/socc/LiouHWTWMCHDCLC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HsingHYW07,
author = {Yu{-}Tsao Hsing and
Chun{-}Chieh Huang and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu},
title = {{SDRAM} Delay Fault Modeling and Performance Testing},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {53--58},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.56},
doi = {10.1109/VTS.2007.56},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/HsingHYW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4669,
author = {Cheng{-}Wen Wu},
title = {{SOC} Testing Methodology and Practice},
journal = {CoRR},
volume = {abs/0710.4669},
year = {2007},
url = {http://arxiv.org/abs/0710.4669},
eprinttype = {arXiv},
eprint = {0710.4669},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4669.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LuTHWW06,
author = {Shyue{-}Kung Lu and
Yu{-}Chen Tsai and
Chih{-}Hsien Hsu and
Kuo{-}Hua Wang and
Cheng{-}Wen Wu},
title = {Efficient built-in redundancy analysis for embedded memories with
2-D redundancy},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {1},
pages = {34--42},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2005.863189},
doi = {10.1109/TVLSI.2005.863189},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LuTHWW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/DenqWW06,
author = {Li{-}Ming Denq and
Tzu{-}chiang Wang and
Cheng{-}Wen Wu},
title = {An Enhanced {SRAM} {BISR} Design with Reduced Timing Penalty},
booktitle = {15th Asian Test Symposium, {ATS} 2006, Fukuoka, Japan, November 20-23,
2006},
pages = {25--30},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ATS.2006.260988},
doi = {10.1109/ATS.2006.260988},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/DenqWW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WangLLYHWH06,
author = {Chen{-}Hsing Wang and
Chih{-}Yen Lo and
Min{-}Sheng Lee and
Jen{-}Chieh Yeh and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Shi{-}Yu Huang},
editor = {Ellen Sentovich},
title = {A network security processor design based on an integrated {SOC} design
and test platform},
booktitle = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006,
San Francisco, CA, USA, July 24-28, 2006},
pages = {490--495},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1146909.1147039},
doi = {10.1145/1146909.1147039},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WangLLYHWH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChenYCYWLL06,
author = {Po{-}Yuan Chen and
Yi{-}Ting Yeh and
Chao{-}Hsun Chen and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu and
Jeng{-}Shen Lee and
Yu{-}Chang Lin},
editor = {Scott Davidson and
Anne Gattiker},
title = {An Enhanced {EDAC} Methodology for Low Power {PSRAM}},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297689},
doi = {10.1109/TEST.2006.297689},
timestamp = {Tue, 12 Dec 2023 09:46:27 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChenYCYWLL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuTWHCK06,
author = {Chin{-}Lung Su and
Chih{-}Wea Tsai and
Cheng{-}Wen Wu and
Chien{-}Chung Hung and
Young{-}Shying Chen and
Ming{-}Jer Kao},
editor = {Scott Davidson and
Anne Gattiker},
title = {Testing {MRAM} for Write Disturbance Fault},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297702},
doi = {10.1109/TEST.2006.297702},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/SuTWHCK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtdt/HsuHYW06,
author = {Mu{-}Hsien Hsu and
Yu{-}Tsao Hsing and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu},
title = {Fault-Pattern Oriented Defect Diagnosis for Flash Memory},
booktitle = {14th {IEEE} International Workshop on Memory Technology, Design, and
Testing {(MTDT} 2006), 2-4 August 2006, Taipei, Taiwan},
pages = {3--8},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/MTDT.2006.13},
doi = {10.1109/MTDT.2006.13},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mtdt/HsuHYW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HsiaoCW06,
author = {Yu{-}Ying Hsiao and
Chao{-}Hsun Chen and
Cheng{-}Wen Wu},
title = {A Built-In Self-Repair Scheme for NOR-Type Flash Memory},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {114--119},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.5},
doi = {10.1109/VTS.2006.5},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/HsiaoCW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Wu06,
author = {Cheng{-}Wen Wu},
title = {Session Abstract},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {128--129},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.68},
doi = {10.1109/VTS.2006.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Wu06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiYHW05,
author = {Jin{-}Fu Li and
Jen{-}Chieh Yeh and
Rei{-}Fu Huang and
Cheng{-}Wen Wu},
title = {A built-in self-repair design for RAMs with 2-D redundancy},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {6},
pages = {742--745},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2005.848824},
doi = {10.1109/TVLSI.2005.848824},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LiYHW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuHHW05,
author = {Chih{-}Pin Su and
Chia{-}Lung Horng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
editor = {Tingao Tang},
title = {A configurable {AES} processor for enhanced security},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
pages = {361--366},
publisher = {{ACM} Press},
year = {2005},
url = {https://doi.org/10.1145/1120725.1120870},
doi = {10.1145/1120725.1120870},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SuHHW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuWCHW05,
author = {Chih{-}Pin Su and
Chen{-}Hsing Wang and
Kuo{-}Liang Cheng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
editor = {Tingao Tang},
title = {Design and test of a scalable security processor},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
pages = {372--375},
publisher = {{ACM} Press},
year = {2005},
url = {https://doi.org/10.1145/1120725.1120872},
doi = {10.1145/1120725.1120872},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SuWCHW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/DawnYWWLC05,
author = {Yu{-}Chun Dawn and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu and
Chia{-}Ching Wang and
Yung{-}Chen Lin and
Chao{-}Hsun Chen},
title = {Flash Memory Die Sort by a Sample Classification Method},
booktitle = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta,
India},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ATS.2005.61},
doi = {10.1109/ATS.2005.61},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/DawnYWWLC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Wu05,
author = {Cheng{-}Wen Wu},
title = {{SOC} Testing Methodology and Practice},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {1120--1121},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.273},
doi = {10.1109/DATE.2005.273},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Wu05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SuYW05,
author = {Chin{-}Lung Su and
Yi{-}Ting Yeh and
Cheng{-}Wen Wu},
title = {An Integrated {ECC} and Redundancy Repair Scheme for Memory Reliability
Enhancement},
booktitle = {20th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2005), 3-5 October 2005, Monterey, CA, {USA}},
pages = {81--92},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DFTVS.2005.18},
doi = {10.1109/DFTVS.2005.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SuYW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtdt/YehKWHC05,
author = {Jen{-}Chieh Yeh and
Shyr{-}Fen Kuo and
Cheng{-}Wen Wu and
Chih{-}Tsun Huang and
Chao{-}Hsun Chen},
title = {A systematic approach to reducing semiconductor memory test time in
mass production},
booktitle = {13th {IEEE} International Workshop on Memory Technology, Design, and
Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
pages = {97--102},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/MTDT.2005.15},
doi = {10.1109/MTDT.2005.15},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mtdt/YehKWHC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YehLSWHL05,
author = {Jen{-}Chieh Yeh and
Yan{-}Ting Lai and
Yuan{-}Yuan Shih and
Cheng{-}Wen Wu and
Chien{-}Hung Ho and
Yen{-}Tai Lin},
title = {Flash Memory Built-In Self-Diagnosis with Test Mode Control},
booktitle = {23rd {IEEE} {VLSI} Test Symposium {(VTS} 2005), 1-5 May 2005, Palm
Springs, CA, {USA}},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/VTS.2005.45},
doi = {10.1109/VTS.2005.45},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/YehLSWHL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WangLPHW05,
author = {Chun{-}Chieh Wang and
Jing{-}Jia Liou and
Yen{-}Lin Peng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {A {BIST} Scheme for {FPGA} Interconnect Delay Faults},
booktitle = {23rd {IEEE} {VLSI} Test Symposium {(VTS} 2005), 1-5 May 2005, Palm
Springs, CA, {USA}},
pages = {201--206},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/VTS.2005.5},
doi = {10.1109/VTS.2005.5},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/WangLPHW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/LinWL04,
author = {Bin{-}Hong Lin and
Cheng{-}Wen Wu and
Hwei{-}Tsu Ann Luh},
title = {Efficient and Economical Test Equipment Setup Using Procorrelation},
journal = {{IEEE} Des. Test Comput.},
volume = {21},
number = {1},
pages = {34--43},
year = {2004},
url = {https://doi.org/10.1109/MDT.2004.1261848},
doi = {10.1109/MDT.2004.1261848},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/LinWL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SuW04,
author = {Chih{-}Pin Su and
Cheng{-}Wen Wu},
title = {A Graph-Based Approach to Power-Constrained {SOC} Test Scheduling},
journal = {J. Electron. Test.},
volume = {20},
number = {1},
pages = {45--60},
year = {2004},
url = {https://doi.org/10.1023/B:JETT.0000009313.23362.fd},
doi = {10.1023/B:JETT.0000009313.23362.FD},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SuW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HuangLCW04,
author = {Rei{-}Fu Huang and
Yan{-}Ting Lai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
editor = {Masaharu Imai},
title = {{SRAM} delay fault modeling and test algorithm development},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {104--109},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.183},
doi = {10.1109/ASPDAC.2004.183},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/HuangLCW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WangSHW04,
author = {Mao{-}Yin Wang and
Chih{-}Pin Su and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
editor = {Masaharu Imai},
title = {An {HMAC} processor with integrated {SHA-1} and {MD5} algorithms},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {456--458},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.45},
doi = {10.1109/ASPDAC.2004.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/WangSHW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HongWC04,
author = {Hao{-}Chiao Hong and
Cheng{-}Wen Wu and
Kwang{-}Ting Cheng},
title = {A Signa-Delta Modulation Based Analog {BIST} System with a Wide Bandwidth
Fifth-Order Analog Response Extractor for Diagnosis Purpose},
booktitle = {13th Asian Test Symposium {(ATS} 2004), 15-17 November 2004, Kenting,
Taiwan},
pages = {62--67},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ATS.2004.5},
doi = {10.1109/ATS.2004.5},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HongWC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuangYSHW04,
author = {Chih{-}Tsun Huang and
Jen{-}Chieh Yeh and
Yuan{-}Yuan Shih and
Rei{-}Fu Huang and
Cheng{-}Wen Wu},
title = {On Test and Diagnostics of Flash Memories},
booktitle = {13th Asian Test Symposium {(ATS} 2004), 15-17 November 2004, Kenting,
Taiwan},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ATS.2004.65},
doi = {10.1109/ATS.2004.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HuangYSHW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuangSWLLC04,
author = {Rei{-}Fu Huang and
Chin{-}Lung Su and
Cheng{-}Wen Wu and
Shen{-}Tien Lin and
Kun{-}Lun Luo and
Yeong{-}Jar Chang},
title = {Fail Pattern Identification for Memory Built-In Self-Repair},
booktitle = {13th Asian Test Symposium {(ATS} 2004), 15-17 November 2004, Kenting,
Taiwan},
pages = {366--371},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ATS.2004.43},
doi = {10.1109/ATS.2004.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HuangSWLLC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/HsingWWHW04,
author = {Yu{-}Tsao Hsing and
Chih{-}Wea Wang and
Ching{-}Wei Wu and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {Failure Factor Based Yield Enhancement for {SRAM} Designs},
booktitle = {19th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2004), 10-13 October 2004, Cannes, France,
Proceedings},
pages = {20--28},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/DFT.2004.29},
doi = {10.1109/DFT.2004.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/HsingWWHW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/PengLHW04,
author = {Yen{-}Lin Peng and
Jing{-}Jia Liou and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {An Application-Independent Delay Testing Methodology for Island-Style
{FPGA}},
booktitle = {19th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2004), 10-13 October 2004, Cannes, France,
Proceedings},
pages = {478--486},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/DFT.2004.7},
doi = {10.1109/DFT.2004.7},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/PengLHW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuHWHKCW04,
author = {Chin{-}Lung Su and
Rei{-}Fu Huang and
Cheng{-}Wen Wu and
Chien{-}Chung Hung and
Ming{-}Jer Kao and
Yeong{-}Jar Chang and
Wen Ching Wu},
title = {{MRAM} Defect Analysis and Fault Modeli},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {124--133},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1386944},
doi = {10.1109/TEST.2004.1386944},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuHWHKCW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtdt/DenqHWCW04,
author = {Li{-}Ming Denq and
Rei{-}Fu Huang and
Cheng{-}Wen Wu and
Yeong{-}Jar Chang and
Wen Ching Wu},
title = {A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories},
booktitle = {12th {IEEE} International Workshop on Memory Technology, Design, and
Testing {(MTDT} 2004), 9-10 August 2004, San Jose, CA, {USA}},
pages = {65--69},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/MTDT.2004.3},
doi = {10.1109/MTDT.2004.3},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtdt/DenqHWCW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cm/SuLHW03,
author = {Chih{-}Pin Su and
Tsung{-}Fu Lin and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {A high-throughput low-cost {AES} processor},
journal = {{IEEE} Commun. Mag.},
volume = {41},
number = {12},
pages = {86--91},
year = {2003},
url = {https://doi.org/10.1109/MCOM.2003.1252803},
doi = {10.1109/MCOM.2003.1252803},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cm/SuLHW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LiTW03,
author = {Jin{-}Fu Li and
Ruey{-}Shing Tzeng and
Cheng{-}Wen Wu},
title = {Testing and Diagnosis Methodologies for Embedded Content Addressable
Memories},
journal = {J. Electron. Test.},
volume = {19},
number = {2},
pages = {207--215},
year = {2003},
url = {https://doi.org/10.1023/A:1022858128485},
doi = {10.1023/A:1022858128485},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/LiTW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/KaoTHWCL03,
author = {Hong{-}Chou Kao and
Ming{-}Fu Tsai and
Shi{-}Yu Huang and
Cheng{-}Wen Wu and
Wen{-}Feng Chang and
Shyue{-}Kung Lu},
title = {Efficient Double Fault Diagnosis for {CMOS} Logic Circuits With a
Specific Application to Generic Bridging Faults},
journal = {J. Inf. Sci. Eng.},
volume = {19},
number = {4},
pages = {571--587},
year = {2003},
url = {http://www.iis.sinica.edu.tw/page/jise/2003/200307\_02.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/KaoTHWCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/ShiehW03,
author = {Shao{-}Hui Shieh and
Cheng{-}Wen Wu},
title = {Asymmetric High-Radix Signed-Digit Number Systems for Carry-Free Addition},
journal = {J. Inf. Sci. Eng.},
volume = {19},
number = {6},
pages = {1015--1039},
year = {2003},
url = {http://www.iis.sinica.edu.tw/page/jise/2003/200311\_07.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/ShiehW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/HongHCWK03,
author = {Hao{-}Chiao Hong and
Jiun{-}Lang Huang and
Kwang{-}Ting Cheng and
Cheng{-}Wen Wu and
Ding{-}Ming Kwai},
title = {Practical considerations in applying {\(\Sigma\)}-{\(\Delta\)} modulation-based
analog {BIST} to sampled-data systems},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {50},
number = {9},
pages = {553--566},
year = {2003},
url = {https://doi.org/10.1109/TCSII.2003.814812},
doi = {10.1109/TCSII.2003.814812},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/HongHCWK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/HuangWLW03,
author = {Chih{-}Tsun Huang and
Chi{-}Feng Wu and
Jin{-}Fu Li and
Cheng{-}Wen Wu},
title = {Built-in redundancy analysis for memory yield improvement},
journal = {{IEEE} Trans. Reliab.},
volume = {52},
number = {4},
pages = {386--399},
year = {2003},
url = {https://doi.org/10.1109/TR.2003.821925},
doi = {10.1109/TR.2003.821925},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/HuangWLW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HongW03,
author = {Jin{-}Hua Hong and
Cheng{-}Wen Wu},
title = {Cellular-array modular multiplier for fast {RSA} public-key cryptosystem
based on modified Booth's algorithm},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {11},
number = {3},
pages = {474--484},
year = {2003},
url = {https://doi.org/10.1109/TVLSI.2003.812308},
doi = {10.1109/TVLSI.2003.812308},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/HongW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SunSHW03,
author = {Ming{-}Cheng Sun and
Chih{-}Pin Su and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
editor = {Hiroto Yasuura},
title = {Design of a scalable {RSA} and {ECC} crypto-processor},
booktitle = {Proceedings of the 2003 Asia and South Pacific Design Automation Conference,
{ASP-DAC} '03, Kitakyushu, Japan, January 21-24, 2003},
pages = {495--498},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/1119772.1119874},
doi = {10.1145/1119772.1119874},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SunSHW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuLHW03,
author = {Chih{-}Pin Su and
Tsung{-}Fu Lin and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
editor = {Hiroto Yasuura},
title = {A highly efficient {AES} cipher chip},
booktitle = {Proceedings of the 2003 Asia and South Pacific Design Automation Conference,
{ASP-DAC} '03, Kitakyushu, Japan, January 21-24, 2003},
pages = {561--562},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/1119772.1119891},
doi = {10.1145/1119772.1119891},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SuLHW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuangCW03,
author = {Rei{-}Fu Huang and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {Defect Oriented Fault Analysis for {SRAM}},
booktitle = {12th Asian Test Symposium {(ATS} 2003), 17-19 November 2003, Xian,
China},
pages = {256--261},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ATS.2003.1250819},
doi = {10.1109/ATS.2003.1250819},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/HuangCW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/SuHW03,
author = {Chin{-}Lung Su and
Rei{-}Fu Huang and
Cheng{-}Wen Wu},
title = {A Processor-Based Built-In Self-Repair Design for Embedded Memories},
booktitle = {12th Asian Test Symposium {(ATS} 2003), 17-19 November 2003, Xian,
China},
pages = {366--371},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ATS.2003.1250838},
doi = {10.1109/ATS.2003.1250838},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/SuHW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChengWLCHW03,
author = {Kuo{-}Liang Cheng and
Chih{-}Wea Wang and
Jih{-}Nung Lee and
Yung{-}Fa Chou and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {{FAME:} {A} Fault-Pattern Based Memory Failure Analysis Framework},
booktitle = {2003 International Conference on Computer-Aided Design, {ICCAD} 2003,
San Jose, CA, USA, November 9-13, 2003},
pages = {595--598},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ICCAD.2003.1257871},
doi = {10.1109/ICCAD.2003.1257871},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChengWLCHW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuCWCH03,
author = {Shyue{-}Kung Lu and
Jian{-}Long Chen and
Cheng{-}Wen Wu and
Ken{-}Feng Chang and
Shi{-}Yu Huang},
title = {Combinational circuit fault diagnosis using logic emulation},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {549--552},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1206347},
doi = {10.1109/ISCAS.2003.1206347},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LuCWCH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/WangCLCHWHY03,
author = {Chih{-}Wea Wang and
Kuo{-}Liang Cheng and
Jih{-}Nung Lee and
Yung{-}Fa Chou and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Frank Huang and
Hong{-}Tzer Yang},
title = {Fault Pattern Oriented Defect Diagnosis for Memories},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {29--38},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/TEST.2003.1270822},
doi = {10.1109/TEST.2003.1270822},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/WangCLCHWHY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LiYHWTHC03,
author = {Jin{-}Fu Li and
Jen{-}Chieh Yeh and
Rei{-}Fu Huang and
Cheng{-}Wen Wu and
Peir{-}Yuan Tsai and
Archer Hsu and
Eugene Chow},
title = {A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D
Redundancy},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {393--402},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/TEST.2003.1270863},
doi = {10.1109/TEST.2003.1270863},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/LiYHWTHC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtdt/HuangDWL03,
author = {Rei{-}Fu Huang and
Li{-}Ming Denq and
Cheng{-}Wen Wu and
Jin{-}Fu Li},
title = {A Testability-Driven Optimizer and Wrapper Generator for Embedded
Memories},
booktitle = {11th {IEEE} International Workshop on Memory Technology, Design, and
Testing {(MTDT} 2003), 28-29 July 2003, San Jose, CA, {USA}},
pages = {53},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/MTDT.2003.1222361},
doi = {10.1109/MTDT.2003.1222361},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mtdt/HuangDWL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WangCHW03,
author = {Chih{-}Wea Wang and
Kuo{-}Liang Cheng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {Test and Diagnosis of Word-Oriented Multiport Memories},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {248--253},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197658},
doi = {10.1109/VTEST.2003.1197658},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/WangCHW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LiTW02,
author = {Jin{-}Fu Li and
Ruey{-}Shing Tzeng and
Cheng{-}Wen Wu},
title = {Diagnostic Data Compression Techniques for Embedded Memories with
Built-In Self-Test},
journal = {J. Electron. Test.},
volume = {18},
number = {4-5},
pages = {515--527},
year = {2002},
url = {https://doi.org/10.1023/A:1016557927479},
doi = {10.1023/A:1016557927479},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/LiTW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/WangWLWTCL02,
author = {Chih{-}Wea Wang and
Chi{-}Feng Wu and
Jin{-}Fu Li and
Cheng{-}Wen Wu and
Tony Teng and
Kevin Chiu and
Hsiao{-}Ping Lin},
title = {A Built-in Self-Test Scheme with Diagnostics Support for Embedded
{SRAM}},
journal = {J. Electron. Test.},
volume = {18},
number = {6},
pages = {637--647},
year = {2002},
url = {https://doi.org/10.1023/A:1020805224219},
doi = {10.1023/A:1020805224219},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/WangWLWTCL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LiHCSWCCHL02,
author = {Jin{-}Fu Li and
Hsin{-}Jung Huang and
Jeng{-}Bin Chen and
Chih{-}Pin Su and
Cheng{-}Wen Wu and
Chuang Cheng and
Shao{-}I Chen and
Chi{-}Yi Hwang and
Hsiao{-}Ping Lin},
title = {A Hierarchical Test Methodology for Systems on Chip},
journal = {{IEEE} Micro},
volume = {22},
number = {5},
pages = {69--81},
year = {2002},
url = {https://doi.org/10.1109/MM.2002.1044301},
doi = {10.1109/MM.2002.1044301},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/LiHCSWCCHL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuHCW02,
author = {Chi{-}Feng Wu and
Chih{-}Tsun Huang and
Kuo{-}Liang Cheng and
Cheng{-}Wen Wu},
title = {Fault simulation and test algorithm generation for random accessmemories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {4},
pages = {480--490},
year = {2002},
url = {https://doi.org/10.1109/43.992771},
doi = {10.1109/43.992771},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuHCW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChengTW02,
author = {Kuo{-}Liang Cheng and
Ming{-}Fu Tsai and
Cheng{-}Wen Wu},
title = {Neighborhood pattern-sensitive fault testing and diagnostics for random-access
memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {11},
pages = {1328--1336},
year = {2002},
url = {https://doi.org/10.1109/TCAD.2002.804101},
doi = {10.1109/TCAD.2002.804101},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChengTW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiW02,
author = {Jin{-}Fu Li and
Cheng{-}Wen Wu},
title = {Efficient {FFT} network testing and diagnosis schemes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {10},
number = {3},
pages = {267--278},
year = {2002},
url = {https://doi.org/10.1109/TVLSI.2002.1043329},
doi = {10.1109/TVLSI.2002.1043329},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LiW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HongHCW02,
author = {Hao{-}Chiao Hong and
Jiun{-}Lang Huang and
Kwang{-}Ting Cheng and
Cheng{-}Wen Wu},
title = {On-chip Analog Response Extraction with 1-Bit ? - Modulators},
booktitle = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
{USA}},
pages = {49},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ATS.2002.1181684},
doi = {10.1109/ATS.2002.1181684},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/HongHCW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WangHLCHWL02,
author = {Chih{-}Wea Wang and
Jing{-}Reng Huang and
Yen{-}Fu Lin and
Kuo{-}Liang Cheng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Youn{-}Long Lin},
title = {Test Scheduling of BISTed Memory Cores for {SOC}},
booktitle = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
{USA}},
pages = {356},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ATS.2002.1181737},
doi = {10.1109/ATS.2002.1181737},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/WangHLCHWL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HsuHCWHWL02,
author = {Huan{-}Shan Hsu and
Jing{-}Reng Huang and
Kuo{-}Liang Cheng and
Chih{-}Wea Wang and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Youn{-}Long Lin},
title = {Test Scheduling and Test Access Architecture Optimization for System-on-Chip},
booktitle = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
{USA}},
pages = {411},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ATS.2002.1181746},
doi = {10.1109/ATS.2002.1181746},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/HsuHCWHWL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LiHCSWCCHL02,
author = {Jin{-}Fu Li and
Hsin{-}Jung Huang and
Jeng{-}Bin Chen and
Chih{-}Pin Su and
Cheng{-}Wen Wu and
Chuang Cheng and
Shao{-}I Chen and
Chi{-}Yi Hwang and
Hsiao{-}Ping Lin},
title = {A Hierarchical Test Scheme for System-On-Chip Designs},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {486--490},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998317},
doi = {10.1109/DATE.2002.998317},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LiHCSWCCHL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/YehWCCHW02,
author = {Jen{-}Chieh Yeh and
Chi{-}Feng Wu and
Kuo{-}Liang Cheng and
Yung{-}Fa Chou and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {Flash Memory Built-In Self-Test Using March-Like Algorithm},
booktitle = {1st {IEEE} International Workshop on Electronic Design, Test and Applications
{(DELTA} 2002), 29-31 January 2002, Christchurch, New Zealand},
pages = {137--141},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DELTA.2002.994602},
doi = {10.1109/DELTA.2002.994602},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/delta/YehWCCHW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/HuangLYW02,
author = {Rei{-}Fu Huang and
Jin{-}Fu Li and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu},
title = {A Simulator for {E} aluating Redundancy Analysis Algorithms of Repairable
Embedded Memories},
booktitle = {8th {IEEE} International On-Line Testing Workshop {(IOLTW} 2002),
8-10 July 2002, Isle of Bendor, France},
pages = {262},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/OLT.2002.1030229},
doi = {10.1109/OLT.2002.1030229},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/HuangLYW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChiuYHW02,
author = {Sau{-}Kwo Chiu and
Jen{-}Chieh Yeh and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {Diagonal Test and Diagnostic Schemes for Flash Memorie},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {37--46},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041743},
doi = {10.1109/TEST.2002.1041743},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChiuYHW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtdt/HuangLYW02,
author = {Rei{-}Fu Huang and
Jin{-}Fu Li and
Jen{-}Chieh Yeh and
Cheng{-}Wen Wu},
title = {A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable
Embedded Memories},
booktitle = {10th {IEEE} International Workshop on Memory Technology, Design, and
Testing {(MTDT} 2002), 10-12 July 2002, Isle of Bendor, France},
pages = {68},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/MTDT.2002.1029766},
doi = {10.1109/MTDT.2002.1029766},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mtdt/HuangLYW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChengYWHW02,
author = {Kuo{-}Liang Cheng and
Jen{-}Chieh Yeh and
Chih{-}Wea Wang and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {{RAMSES-FT:} {A} Fault Simulator for Flash Memory Testing and Diagnostics},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {281--288},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011153},
doi = {10.1109/VTS.2002.1011153},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChengYWHW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiTW02,
author = {Jin{-}Fu Li and
Ruey{-}Shing Tzeng and
Cheng{-}Wen Wu},
title = {Testing and Diagnosing Embedded Content Addressable Memories},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {389--394},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011169},
doi = {10.1109/VTS.2002.1011169},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LiTW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/WuHW01,
author = {Chung{-}Hsien Wu and
Jin{-}Hua Hong and
Cheng{-}Wen Wu},
title = {{VLSI} Design of {RSA} Cryptosystem Based on the Chinese Remainder
Theorem},
journal = {J. Inf. Sci. Eng.},
volume = {17},
number = {6},
pages = {967--980},
year = {2001},
url = {http://www.iis.sinica.edu.tw/page/jise/2001/200111\_07.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/WuHW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HwangW01,
author = {Shih{-}Arn Hwang and
Cheng{-}Wen Wu},
title = {Unified {VLSI} systolic array design for {LZ} data compression},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {9},
number = {4},
pages = {489--499},
year = {2001},
url = {https://doi.org/10.1109/92.931226},
doi = {10.1109/92.931226},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/HwangW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TsaiW01,
author = {Ching{-}Hong Tsai and
Cheng{-}Wen Wu},
editor = {Satoshi Goto},
title = {Processor-programmable memory {BIST} for bus-connected embedded memories},
booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {325--330},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/370155.370368},
doi = {10.1145/370155.370368},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TsaiW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WuHW01,
author = {Chung{-}Hsien Wu and
Jin{-}Hua Hong and
Cheng{-}Wen Wu},
editor = {Satoshi Goto},
title = {{RSA} cryptosystem design based on the Chinese remainder theorem},
booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {391--395},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/370155.370419},
doi = {10.1145/370155.370419},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/WuHW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChengHHYHW01,
author = {Kuo{-}Liang Cheng and
Chia{-}Ming Hsueh and
Jing{-}Reng Huang and
Jen{-}Chieh Yeh and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip},
booktitle = {10th Asian Test Symposium {(ATS} 2001), 19-21 November 2001, Kyoto,
Japan},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ATS.2001.990265},
doi = {10.1109/ATS.2001.990265},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChengHHYHW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WangTWHWHLW01,
author = {Chih{-}Wea Wang and
Ruey{-}Shing Tzeng and
Chi{-}Feng Wu and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Shi{-}Yu Huang and
Shyh{-}Horng Lin and
Hsin{-}Po Wang},
title = {A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous {SRAM}
Clusters},
booktitle = {10th Asian Test Symposium {(ATS} 2001), 19-21 November 2001, Kyoto,
Japan},
pages = {103},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ATS.2001.990267},
doi = {10.1109/ATS.2001.990267},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/WangTWHWHLW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WuHCWW01,
author = {Chi{-}Feng Wu and
Chih{-}Tsun Huang and
Kuo{-}Liang Cheng and
Chih{-}Wea Wang and
Cheng{-}Wen Wu},
title = {Simulation-Based Test Algorithm Generation and Port Scheduling for
Multi-Port Memories},
booktitle = {Proceedings of the 38th Design Automation Conference, {DAC} 2001,
Las Vegas, NV, USA, June 18-22, 2001},
pages = {301--306},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/378239.378491},
doi = {10.1145/378239.378491},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WuHCWW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LiW01,
author = {Jin{-}Fu Li and
Cheng{-}Wen Wu},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Memory fault diagnosis by syndrome compression},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {97--101},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915007},
doi = {10.1109/DATE.2001.915007},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LiW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/LuLW01,
author = {Shyue{-}Kung Lu and
Tsung{-}Ying Lee and
Cheng{-}Wen Wu},
title = {A Profit Evaluation System {(PES)} for logic cores at early design
stage},
booktitle = {Proceedings of the 2001 8th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2001, Malta, September 2-5, 2001},
pages = {1491--1494},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ICECS.2001.957497},
doi = {10.1109/ICECS.2001.957497},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/LuLW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LiCHW01,
author = {Jin{-}Fu Li and
Kuo{-}Liang Cheng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {March-based {RAM} diagnosis algorithms for stuck-at and coupling faults},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {758--767},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966697},
doi = {10.1109/TEST.2001.966697},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/LiCHW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChengTW01,
author = {Kuo{-}Liang Cheng and
Ming{-}Fu Tsai and
Cheng{-}Wen Wu},
title = {Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for
Semiconductor Memories},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {225--230},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923443},
doi = {10.1109/VTS.2001.923443},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChengTW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/SuW00,
author = {Chih{-}Yuang Su and
Cheng{-}Wen Wu},
title = {A Probabilistic Model for Path Delay Fault Testing},
journal = {J. Inf. Sci. Eng.},
volume = {16},
number = {5},
pages = {783--794},
year = {2000},
url = {http://www.iis.sinica.edu.tw/page/jise/2000/200009\_08.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/SuW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LinW00,
author = {Kun{-}Jin Lin and
Cheng{-}Wen Wu},
title = {A Low-Power {CAM} Design for {LZ} Data Compression},
journal = {{IEEE} Trans. Computers},
volume = {49},
number = {10},
pages = {1139--1145},
year = {2000},
url = {https://doi.org/10.1109/12.888055},
doi = {10.1109/12.888055},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LinW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinW00,
author = {Kun{-}Jin Lin and
Cheng{-}Wen Wu},
title = {Testing content-addressable memories using functional fault modelsand
march-like algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {19},
number = {5},
pages = {577--588},
year = {2000},
url = {https://doi.org/10.1109/43.845082},
doi = {10.1109/43.845082},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinSW00,
author = {Bin{-}Hong Lin and
Shao{-}Hui Shieh and
Cheng{-}Wen Wu},
title = {A fast signature computation algorithm for {LFSR} and {MISR}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {19},
number = {9},
pages = {1031--1040},
year = {2000},
url = {https://doi.org/10.1109/43.863643},
doi = {10.1109/43.863643},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinSW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HongTW00,
author = {Jin{-}Hua Hong and
Chung{-}Hung Tsai and
Cheng{-}Wen Wu},
title = {Hierarchical system test by an {IEEE} 1149.5 MTM-bus slave-module
interface core},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {8},
number = {5},
pages = {503--516},
year = {2000},
url = {https://doi.org/10.1109/92.894154},
doi = {10.1109/92.894154},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/HongTW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsi/WuW00,
author = {Chi{-}Feng Wu and
Cheng{-}Wen Wu},
title = {Testing and Diagnosing Dynamic Reconfigurable {FPGA}},
journal = {{VLSI} Design},
volume = {10},
number = {3},
pages = {321--333},
year = {2000},
url = {https://doi.org/10.1155/2000/79281},
doi = {10.1155/2000/79281},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsi/WuW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HuangHW00,
author = {Chih{-}Tsun Huang and
Jing{-}Reng Huang and
Cheng{-}Wen Wu},
title = {A programmable built-in self-test core for embedded memories},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {11--12},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368474},
doi = {10.1145/368434.368474},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HuangHW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HongW00,
author = {Jin{-}Hua Hong and
Cheng{-}Wen Wu},
title = {Radix-4 modular multiplication and exponentiation algorithms for the
{RSA} public-key cryptosystem},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {565--570},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368726},
doi = {10.1145/368434.368726},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HongW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WangWLWTCL00,
author = {Chih{-}Wea Wang and
Chi{-}Feng Wu and
Jin{-}Fu Li and
Cheng{-}Wen Wu and
Tony Teng and
Kevin Chiu and
Hsiao{-}Ping Lin},
title = {A built-in self-test and self-diagnosis scheme for embedded {SRAM}},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893601},
doi = {10.1109/ATS.2000.893601},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/WangWLWTCL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuangOCW00,
author = {Jing{-}Reng Huang and
Chee{-}Kian Ong and
Kwang{-}Ting Cheng and
Cheng{-}Wen Wu},
title = {An FPGA-based re-configurable functional tester for memory chips},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {51--57},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893602},
doi = {10.1109/ATS.2000.893602},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HuangOCW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LiYWM00,
author = {Lijian Li and
Xiaoyang Yu and
Cheng{-}Wen Wu and
Yinghua Min},
title = {A waveform simulator based on Boolean process},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {145--150},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893617},
doi = {10.1109/ATS.2000.893617},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LiYWM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LuSW00,
author = {Shyue{-}Kung Lu and
Jen{-}Sheng Shih and
Cheng{-}Wen Wu},
title = {A Testable/Fault Tolerant {FFT} Processor Design},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {429},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893661},
doi = {10.1109/ATS.2000.893661},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LuSW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LuW00,
author = {Juin{-}Ming Lu and
Cheng{-}Wen Wu},
editor = {Ivo Bolsens},
title = {Cost and Benefit Models for Logic and Memory {BIST}},
booktitle = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March
2000, Paris, France},
pages = {710--714},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2000},
url = {https://doi.org/10.1109/DATE.2000.840865},
doi = {10.1109/DATE.2000.840865},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LuW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ChengHHWWT00,
author = {Chuang Cheng and
Chih{-}Tsun Huang and
Jing{-}Reng Huang and
Cheng{-}Wen Wu and
Chen{-}Jong Wey and
Ming{-}Chang Tsai},
title = {{BRAINS:} {A} {BIST} Compiler for Embedded Memories},
booktitle = {15th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2000), 25-27 October 2000, Yamanashi, Japan,
Proceedings},
pages = {299},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/DFTVS.2000.887170},
doi = {10.1109/DFTVS.2000.887170},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/ChengHHWWT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WuHWCW00,
author = {Chi{-}Feng Wu and
Chih{-}Tsun Huang and
Chih{-}Wea Wang and
Kuo{-}Liang Cheng and
Cheng{-}Wen Wu},
editor = {Ellen Sentovich},
title = {Error Catch and Analysis for Semiconductor Memories Using March Tests},
booktitle = {Proceedings of the 2000 {IEEE/ACM} International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {468--471},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCAD.2000.896516},
doi = {10.1109/ICCAD.2000.896516},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/WuHWCW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuSW00,
author = {Shyue{-}Kung Lu and
Jen{-}Sheng Shih and
Cheng{-}Wen Wu},
title = {Built-in self-test and fault diagnosis for lookup table FPGAs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
May 2000, Proceedings},
pages = {80--83},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ISCAS.2000.857031},
doi = {10.1109/ISCAS.2000.857031},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LuSW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WuHCW00,
author = {Chi{-}Feng Wu and
Chih{-}Tsun Huang and
Kuo{-}Liang Cheng and
Cheng{-}Wen Wu},
title = {Simulation-Based Test Algorithm Generation for Random Access Memories},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {291--296},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843857},
doi = {10.1109/VTEST.2000.843857},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/WuHCW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@article{DBLP:journals/dt/HuangHWWC99,
author = {Chih{-}Tsun Huang and
Jing{-}Reng Huang and
Chi{-}Feng Wu and
Cheng{-}Wen Wu and
Tsin{-}Yuan Chang},
title = {A Programmable {BIST} Core for Embedded {DRAM}},
journal = {{IEEE} Des. Test Comput.},
volume = {16},
number = {1},
pages = {59--70},
year = {1999},
url = {https://doi.org/10.1109/54.748806},
doi = {10.1109/54.748806},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HuangHWWC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/ChangW99,
author = {Wen{-}Feng Chang and
Cheng{-}Wen Wu},
title = {{TSC} Berger-Code Checker Design for 2r-1-Bit Information},
journal = {J. Inf. Sci. Eng.},
volume = {15},
number = {3},
pages = {429--440},
year = {1999},
url = {http://www.iis.sinica.edu.tw/page/jise/1999/199905\_08.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/ChangW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/HwangW99,
author = {Shih{-}Arn Hwang and
Cheng{-}Wen Wu},
title = {Test Energy Minimization for C-Testable ILAs},
journal = {J. Inf. Sci. Eng.},
volume = {15},
number = {6},
pages = {899--911},
year = {1999},
url = {http://www.iis.sinica.edu.tw/page/jise/1999/199911\_06.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/HwangW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChangW99,
author = {Wen{-}Feng Chang and
Cheng{-}Wen Wu},
title = {Low-Cost Modular Totally Self-Checking Checker Design for m-out-of-n
Code},
journal = {{IEEE} Trans. Computers},
volume = {48},
number = {8},
pages = {815--826},
year = {1999},
url = {https://doi.org/10.1109/12.795123},
doi = {10.1109/12.795123},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChangW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SuHCW99,
author = {Chih{-}Yuang Su and
Shih{-}Am Hwang and
Po{-}Song Chen and
Cheng{-}Wen Wu},
title = {An improved Montgomery's algorithm for high-speed {RSA} public-key
cryptosystem},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {7},
number = {2},
pages = {280--284},
year = {1999},
url = {https://doi.org/10.1109/92.766756},
doi = {10.1109/92.766756},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/SuHCW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/aspdac/WuW99,
author = {Chi{-}Feng Wu and
Cheng{-}Wen Wu},
title = {Testing Interconnects of Dynamic Reconfigurable FPGAs},
booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation,
Wanchai, Hong Kong, China, January 18-21, 1999},
pages = {279--282},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ASPDAC.1999.760013},
doi = {10.1109/ASPDAC.1999.760013},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WuW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/ats/LuLW99,
author = {Shyue{-}Kung Lu and
Tsung{-}Ying Lee and
Cheng{-}Wen Wu},
title = {Defect Level Prediction Using Multi-Model Fault Coverage},
booktitle = {8th Asian Test Symposium {(ATS} '99), 16-18 November 1999, Shanghai,
China},
pages = {301},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ATS.1999.810767},
doi = {10.1109/ATS.1999.810767},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LuLW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/WuHW99,
author = {Chi{-}Feng Wu and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {{RAMSES:} {A} Fast Memory Fault Simulator},
booktitle = {14th International Symposium on Defect and Fault-Tolerance in {VLSI}
Systems {(DFT} '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings},
pages = {165--173},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/DFTVS.1999.802882},
doi = {10.1109/DFTVS.1999.802882},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/WuHW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LiW99,
author = {Jin{-}Fu Li and
Cheng{-}Wen Wu},
title = {Testable and Fault Tolerant Design for {FFT} Networks},
booktitle = {14th International Symposium on Defect and Fault-Tolerance in {VLSI}
Systems {(DFT} '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings},
pages = {201--209},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/DFTVS.1999.802886},
doi = {10.1109/DFTVS.1999.802886},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/LiW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LuW99,
author = {Shyue{-}Kung Lu and
Cheng{-}Wen Wu},
title = {A novel approach to testing LUT-based FPGAs},
booktitle = {Proceedings of the 1999 International Symposium on Circuits and Systems,
{ISCAS} 1999, Orlando, Florida, USA, May 30 - June 2, 1999},
pages = {173--177},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/ISCAS.1999.777831},
doi = {10.1109/ISCAS.1999.777831},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LuW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ShiehW98,
author = {Yeong{-}Ruey Shieh and
Cheng{-}Wen Wu},
title = {Control and Observation Structures for Analog Circuits},
journal = {{IEEE} Des. Test Comput.},
volume = {15},
number = {2},
pages = {56--64},
year = {1998},
url = {https://doi.org/10.1109/54.679208},
doi = {10.1109/54.679208},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/ShiehW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HwangHW98,
author = {Shih{-}Arn Hwang and
Jin{-}Hua Hong and
Cheng{-}Wen Wu},
title = {Sequential circuit fault simulation using logic emulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {8},
pages = {724--736},
year = {1998},
url = {https://doi.org/10.1109/43.712103},
doi = {10.1109/43.712103},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HwangHW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsi/ShiehW98,
author = {Yeong{-}Ruey Shieh and
Cheng{-}Wen Wu},
title = {Design of {CMOS} {PSCD} Circuits and Checkers for Stuck-At and Stuck-On
Faults},
journal = {{VLSI} Design},
volume = {5},
number = {4},
pages = {357--372},
year = {1998},
url = {https://doi.org/10.1155/1998/24951},
doi = {10.1155/1998/24951},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsi/ShiehW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WuS98,
author = {Cheng{-}Wen Wu and
Chih{-}Yuang Su},
title = {A Probabilistic Model for Path Delay Faults},
booktitle = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ATS.1998.741590},
doi = {10.1109/ATS.1998.741590},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/WuS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/ats/ChuangW98,
author = {Yu{-}Chun Chuang and
Cheng{-}Wen Wu},
title = {On-Line Error Detection Schemes for a Systolic Finite-Field Inverter},
booktitle = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
pages = {301--305},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ATS.1998.741629},
doi = {10.1109/ATS.1998.741629},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChuangW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/ats/Wu98,
author = {Cheng{-}Wen Wu},
title = {Testing Embedded Memories: Is {BIST} the Ultimate Solution?},
booktitle = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
pages = {516--517},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ATS.1998.741668},
doi = {10.1109/ATS.1998.741668},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/Wu98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/LinW97,
author = {Kun{-}Jin Lin and
Cheng{-}Wen Wu},
title = {Practical Realization of Multiple-Input Exclusive-OR Circuits for
Low-Power Applications},
journal = {J. Circuits Syst. Comput.},
volume = {7},
number = {1},
pages = {31--48},
year = {1997},
url = {https://doi.org/10.1142/S0218126697000048},
doi = {10.1142/S0218126697000048},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/LinW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@article{DBLP:journals/jise/ChangW97,
author = {Wen{-}Feng Chang and
Cheng{-}Wen Wu},
title = {Does There Exist a Combinational {TSC} Checker for 1/3 Code Using
Only Primitive Gates?},
journal = {J. Inf. Sci. Eng.},
volume = {13},
number = {4},
pages = {681--695},
year = {1997},
url = {http://www.iis.sinica.edu.tw/page/jise/1997/199712\_10.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/ChangW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LuKW97,
author = {Shyue{-}Kung Lu and
Sy{-}Yen Kuo and
Cheng{-}Wen Wu},
title = {Fault-Tolerant Interleaved Memory Systems with Two-Level Redundancy},
journal = {{IEEE} Trans. Computers},
volume = {46},
number = {9},
pages = {1028--1034},
year = {1997},
url = {https://doi.org/10.1109/12.620483},
doi = {10.1109/12.620483},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LuKW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Cheng{-}Wen Wu},
title = {On energy efficiency of {VLSI} testing},
booktitle = {6th Asian Test Symposium {(ATS} '97), 17-18 November 1997, Akita,
Japan},
pages = {132--137},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ATS.1997.643948},
doi = {10.1109/ATS.1997.643948},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/Wu97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HuangW97,
author = {Chih{-}Tsun Huang and
Cheng{-}Wen Wu},
title = {High-speed C-testable systolic array design for Galois-field inversion},
booktitle = {European Design and Test Conference, ED{\&}TC '97, Paris, France,
17-20 March 1997},
pages = {342--346},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/EDTC.1997.582380},
doi = {10.1109/EDTC.1997.582380},
timestamp = {Fri, 20 May 2022 15:59:03 +0200},
biburl = {https://dblp.org/rec/conf/date/HuangW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Shyue{-}Kung Lu and
Cheng{-}Wen Wu and
Ruei{-}Zong Hwang},
title = {Cell delay fault testing for iterative logic arrays},
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number = {3},
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year = {1996},
url = {https://doi.org/10.1007/BF00134694},
doi = {10.1007/BF00134694},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/LuWH96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/ats/HongTW96,
author = {Jin{-}Hua Hong and
Chung{-}Hung Tsai and
Cheng{-}Wen Wu},
title = {Hierarchical Testing Using the {IEEE} Std 1149.5 Module Test and Maintenance
Slave Interface Module},
booktitle = {5th Asian Test Symposium {(ATS} '96), November 20-22, 1996, Hsinchu,
Taiwan},
pages = {50--55},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ATS.1996.555136},
doi = {10.1109/ATS.1996.555136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HongTW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/ats/LinSW96,
author = {Bin{-}Hong Lin and
Shao{-}Hui Shieh and
Cheng{-}Wen Wu},
title = {A {MISR} Computation Algorithm for Fast Signature Simulation},
booktitle = {5th Asian Test Symposium {(ATS} '96), November 20-22, 1996, Hsinchu,
Taiwan},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ATS.1996.555161},
doi = {10.1109/ATS.1996.555161},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yih{-}Lang Li and
Cheng{-}Wen Wu},
title = {Cellular automata for efficient parallel logic and fault simulation},
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timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Shyue{-}Kung Lu and
Jen{-}Chuan Wang and
Cheng{-}Wen Wu},
title = {C-testable design techniques for iterative logic arrays},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {3},
number = {1},
pages = {146--152},
year = {1995},
url = {https://doi.org/10.1109/92.365462},
doi = {10.1109/92.365462},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Cheng{-}Wen Wu and
Ming{-}Kwang Chang},
title = {Bit-level systolic arrays for finite-field multiplications},
journal = {J. {VLSI} Signal Process.},
volume = {10},
number = {1},
pages = {85--92},
year = {1995},
url = {https://doi.org/10.1007/BF02407028},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yeong{-}Ruey Shieh and
Cheng{-}Wen Wu},
title = {{DC} control and observation structures for analog circuits},
booktitle = {4th Asian Test Symposium {(ATS} '95), November 23-24, 1995. Bangalore,
India},
pages = {120--126},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ATS.1995.485326},
doi = {10.1109/ATS.1995.485326},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ShiehW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Shih{-}Yuang Su and
Cheng{-}Wen Wu},
title = {Testing Iterative Logic Arrays for Sequential Faults with a Constant
Number of Patterns},
journal = {{IEEE} Trans. Computers},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yih{-}Lang Li and
Cheng{-}Wen Wu},
editor = {Robert Werner},
title = {Logic and Fault Simulation by Cellular Automata},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {552--556},
publisher = {{IEEE} Computer Society},
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url = {https://doi.org/10.1109/EDTC.1994.326820},
doi = {10.1109/EDTC.1994.326820},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/LiW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/iscas/WuC94,
author = {Cheng{-}Wen Wu and
Yung{-}Fa Chou},
title = {General Modular Multiplication by Block Multiplication and Table Lookup},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {295--298},
publisher = {{IEEE}},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Cheng{-}Wen Wu and
Jiann{-}Yuan Choue},
title = {Fault-Tolerant {FFT} Butterfly Network Design},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Kun{-}Jin Lin and
Cheng{-}Wen Wu},
title = {Easily Testable Cellular Array Multipliers},
journal = {J. Inf. Sci. Eng.},
volume = {7},
number = {3},
pages = {367--383},
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url = {http://www.iis.sinica.edu.tw/page/jise/1991/199109\_04.html},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Cheng{-}Wen Wu},
title = {Bit-level pipelined 2-D digital filters for real-time image processing},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
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author = {Cheng{-}Wen Wu and
Shyue{-}Kung Lu},
title = {Designing Self-Testable Cellular Arrays},
booktitle = {Proceedings 1991 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '91, Cambridge, MA,
USA, October 14-16, 1991},
pages = {110--113},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCD.1991.139857},
doi = {10.1109/ICCD.1991.139857},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WuL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/Wu90,
author = {Cheng{-}Wen Wu},
title = {Relating Tiling and Coloring to Testing of Combinational Iterative
Logic Arrays},
journal = {J. Inf. Sci. Eng.},
volume = {6},
number = {1},
pages = {63--72},
year = {1990},
url = {http://www.iis.sinica.edu.tw/page/jise/1990/199003\_05.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/Wu90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/WuC90,
author = {Cheng{-}Wen Wu and
Peter R. Cappello},
title = {Easily Testable Iterative Logic Arrays},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {5},
pages = {640--652},
year = {1990},
url = {https://doi.org/10.1109/12.53577},
doi = {10.1109/12.53577},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/WuC90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsp/WuC88,
author = {Cheng{-}Wen Wu and
Peter R. Cappello},
title = {Application-specific {CAD} of {VLSI} second-order sections},
journal = {{IEEE} Trans. Acoust. Speech Signal Process.},
volume = {36},
number = {5},
pages = {813--825},
year = {1988},
url = {https://doi.org/10.1109/29.1590},
doi = {10.1109/29.1590},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tsp/WuC88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/CappelloW87,
author = {Peter R. Cappello and
Cheng{-}Wen Wu},
title = {Computer-aided design of {VLSI} {FIR} filters},
journal = {Proc. {IEEE}},
volume = {75},
number = {9},
pages = {1260--1271},
year = {1987},
url = {https://doi.org/10.1109/PROC.1987.13878},
doi = {10.1109/PROC.1987.13878},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pieee/CappelloW87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/WuC87,
author = {Cheng{-}Wen Wu and
Peter R. Cappello},
title = {Application-Specific {CAD} of High-Throughout {IIR} Filters},
booktitle = {COMPCON'87, Digest of Papers, Thirty-Second {IEEE} Computer Society
International Conference, San Francisco, California, USA, February
23-27, 1987},
pages = {302--305},
publisher = {{IEEE} Computer Society},
year = {1987},
timestamp = {Tue, 27 Jun 2006 14:43:07 +0200},
biburl = {https://dblp.org/rec/conf/compcon/WuC87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/WuC87,
author = {Cheng{-}Wen Wu and
Peter R. Cappello},
title = {Computer-aided design of {VLSI} second-order sections},
booktitle = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
{ICASSP} '87, Dallas, Texas, USA, April 6-9, 1987},
pages = {1907--1910},
publisher = {{IEEE}},
year = {1987},
url = {https://doi.org/10.1109/ICASSP.1987.1169341},
doi = {10.1109/ICASSP.1987.1169341},
timestamp = {Mon, 09 Aug 2021 14:54:02 +0200},
biburl = {https://dblp.org/rec/conf/icassp/WuC87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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