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ORCIDBibTeX records: Feng Zhang 0014
@article{DBLP:journals/tcasI/WuCYYFRLMWZ24,
author = {Hao Wu and
Yong Chen and
Yiyang Yuan and
Jinshan Yue and
Xiangqu Fu and
Qirui Ren and
Qing Luo and
Pui{-}In Mak and
Xinghua Wang and
Feng Zhang},
title = {A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating
Macro-Level Pipeline and Texture/Algebraic Sparsity},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {71},
number = {2},
pages = {689--702},
year = {2024},
url = {https://doi.org/10.1109/TCSI.2023.3325850},
doi = {10.1109/TCSI.2023.3325850},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/WuCYYFRLMWZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YuanYWLMCTWHZWRXMZ24,
author = {Yiyang Yuan and
Yiming Yang and
Xinghua Wang and
Xiaoran Li and
Cailian Ma and
Qirui Chen and
Meini Tang and
Xi Wei and
Zhixian Hou and
Jialiang Zhu and
Hao Wu and
Qirui Ren and
Guozhong Xing and
Pui{-}In Mak and
Feng Zhang},
title = {34.6 {A} 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point
{SRAM} Computing-in-Memory Macro with Logarithm Bit-Width Residual
{ADC}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
San Francisco, CA, USA, February 18-22, 2024},
pages = {576--578},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISSCC49657.2024.10454313},
doi = {10.1109/ISSCC49657.2024.10454313},
timestamp = {Tue, 19 Mar 2024 09:04:31 +0100},
biburl = {https://dblp.org/rec/conf/isscc/YuanYWLMCTWHZWRXMZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/YeWZALGLYHXYLSZTDLL23,
author = {Wang Ye and
Linfang Wang and
Zhidao Zhou and
Junjie An and
Weizeng Li and
Hanghang Gao and
Zhi Li and
Jinshan Yue and
Hongyang Hu and
Xiaoxin Xu and
Jianguo Yang and
Jing Liu and
Dashan Shang and
Feng Zhang and
Jinghui Tian and
Chunmeng Dou and
Qi Liu and
Ming Liu},
title = {A 28-nm {RRAM} Computing-in-Memory Macro Using Weighted Hybrid 2T1R
Cell Array and Reference Subtracting Sense Amplifier for {AI} Edge
Inference},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {10},
pages = {2839--2850},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2023.3280357},
doi = {10.1109/JSSC.2023.3280357},
timestamp = {Sat, 28 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/YeWZALGLYHXYLSZTDLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/FuRWXLYCZ23,
author = {Xiangqu Fu and
Qirui Ren and
Hao Wu and
Feibin Xiang and
Qing Luo and
Jinshan Yue and
Yong Chen and
Feng Zhang},
title = {P\({}^{\mbox{3}}\) ViT: {A} CIM-Based High-Utilization Architecture
With Dynamic Pruning and Two-Way Ping-Pong Macro for Vision Transformer},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {70},
number = {12},
pages = {4938--4948},
year = {2023},
url = {https://doi.org/10.1109/TCSI.2023.3315060},
doi = {10.1109/TCSI.2023.3315060},
timestamp = {Sat, 13 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/FuRWXLYCZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RenHCGWYWFXLGCZLWZCM23,
author = {Qirui Ren and
Qiang Huo and
Zhisheng Chen and
Qi Gao and
Yiming Wang and
Yiming Yang and
Hao Wu and
Xiangqu Fu and
Xiaoxin Xu and
Qing Luo and
Jianfeng Gao and
Chengying Chen and
Xiaojin Zhao and
Dengyun Lei and
Xinghua Wang and
Feng Zhang and
Yong Chen and
Pui{-}In Mak},
title = {A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant
{RFID} Tag With 16.2-{\(\mu\)}W Embedded {RRAM} and Reconfigurable
Strong {PUF}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {31},
number = {2},
pages = {243--252},
year = {2023},
url = {https://doi.org/10.1109/TVLSI.2022.3222522},
doi = {10.1109/TVLSI.2022.3222522},
timestamp = {Fri, 12 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/RenHCGWYWFXLGCZLWZCM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YueHWCHZSLDZYLL23,
author = {Jinshan Yue and
Chaojie He and
Zi Wang and
Zhaori Cong and
Yifan He and
Mufeng Zhou and
Wenyu Sun and
Xueqing Li and
Chunmeng Dou and
Feng Zhang and
Huazhong Yang and
Yongpan Liu and
Ming Liu},
title = {A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point
{NN} Inference/Training with Intensive-CIM Sparse-Digital Architecture},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
San Francisco, CA, USA, February 19-23, 2023},
pages = {252--253},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISSCC42615.2023.10067779},
doi = {10.1109/ISSCC42615.2023.10067779},
timestamp = {Wed, 29 Mar 2023 15:53:39 +0200},
biburl = {https://dblp.org/rec/conf/isscc/YueHWCHZSLDZYLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/RenCDXCZ22,
author = {Qirui Ren and
Chengying Chen and
Danian Dong and
Xiaoxin Xu and
Yong Chen and
Feng Zhang},
title = {A 13 {\(\mathrm{\mu}\)}W Analog Front-End with RRAM-Based Lowpass
{FIR} Filter for {EEG} Signal Detection},
journal = {Sensors},
volume = {22},
number = {16},
pages = {6096},
year = {2022},
url = {https://doi.org/10.3390/s22166096},
doi = {10.3390/S22166096},
timestamp = {Mon, 21 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sensors/RenCDXCZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/chinaf/DingGYXLLYLYZL21,
author = {Qingting Ding and
Tiancheng Gong and
Jie Yu and
Xiaoxin Xu and
Xiaoyan Li and
Hangbing Lv and
Jianguo Yang and
Qing Luo and
Peng Yuan and
Feng Zhang and
Ming Liu},
title = {Investigation of weight updating modes on oxide-based resistive switching
memory synapse towards neuromorphic computing applications},
journal = {Sci. China Inf. Sci.},
volume = {64},
number = {11},
year = {2021},
url = {https://doi.org/10.1007/s11432-020-3127-x},
doi = {10.1007/S11432-020-3127-X},
timestamp = {Thu, 30 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/chinaf/DingGYXLLYLYZL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/WangYDSXLSGZLCL21,
author = {Linfang Wang and
Wang Ye and
Chunmeng Dou and
Xin Si and
Xiaoxin Xu and
Jing Liu and
Dashan Shang and
Jianfeng Gao and
Feng Zhang and
Yongpan Liu and
Meng{-}Fan Chang and
Qi Liu},
title = {Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage
Division in 2T2R {RRAM} With Input-Dependent Sensing Control},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {68},
number = {5},
pages = {1640--1644},
year = {2021},
url = {https://doi.org/10.1109/TCSII.2021.3067385},
doi = {10.1109/TCSII.2021.3067385},
timestamp = {Fri, 12 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/WangYDSXLSGZLCL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YangXXWJYDZLL21,
author = {Jianguo Yang and
Xiaoyong Xue and
Xiaoxin Xu and
Qiao Wang and
Haijun Jiang and
Jie Yu and
Danian Dong and
Feng Zhang and
Hangbing Lv and
Ming Liu},
title = {24.2 {A} 14nm-FinFET 1Mb Embedded 1T1R {RRAM} with a 0.022{\(\mathrm{\mu}\)}
m\({}^{\mbox{2}}\) Cell Size Using Self-Adaptive Delayed Termination
and Multi-Cell Reference},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {336--338},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365945},
doi = {10.1109/ISSCC42613.2021.9365945},
timestamp = {Thu, 30 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/YangXXWJYDZLL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/TanWYLWZWGL20,
author = {Fei Tan and
Yiming Wang and
Yiming Yang and
Liran Li and
Tian Wang and
Feng Zhang and
Xinghua Wang and
Jianfeng Gao and
Yongpan Liu},
title = {A ReRAM-Based Computing-in-Memory Convolutional-Macro With Customized
2T2R Bit-Cell for AIoT Chip {IP} Applications},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {67-II},
number = {9},
pages = {1534--1538},
year = {2020},
url = {https://doi.org/10.1109/TCSII.2020.3013336},
doi = {10.1109/TCSII.2020.3013336},
timestamp = {Fri, 12 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/TanWYLWZWGL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhaoZZCZL20,
author = {Qiang Zhao and
Wenhan Zheng and
Xiaojin Zhao and
Yuan Cao and
Feng Zhang and
Man{-}Kay Law},
title = {A 108 F\({}^{\mbox{2}}\)/Bit Fully Reconfigurable {RRAM} {PUF} Based
on Truly Random Dynamic Entropy of Jitter Noise},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-I},
number = {11},
pages = {3866--3879},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2020.3008407},
doi = {10.1109/TCSI.2020.3008407},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhaoZZCZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/YangXXL0ZC020,
author = {Jianguo Yang and
Xiaoyong Xue and
Xiaoxin Xu and
Hangbing Lv and
Feng Zhang and
Xiaoyang Zeng and
Meng{-}Fan Chang and
Ming Liu},
title = {A 28nm 1.5Mb Embedded 1T2R {RRAM} with 14.8 Mb/mm\({}^{\mbox{2}}\)
using Sneaking Current Suppression and Compensation Techniques},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9163035},
doi = {10.1109/VLSICIRCUITS18222.2020.9163035},
timestamp = {Mon, 24 Aug 2020 16:22:01 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/YangXXL0ZC020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/WangLSFWLLZWCL19,
author = {Yiming Wang and
Yun Li and
Haihua Shen and
Dongyu Fan and
Wei Wang and
Ling Li and
Qi Liu and
Feng Zhang and
Xinghua Wang and
Meng{-}Fan Chang and
Ming Liu},
title = {A Few-Step and Low-Cost Memristor Logic Based on {MIG} Logic for Frequent-Off
Instant-On Circuits in IoT Applications},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {66-II},
number = {4},
pages = {662--666},
year = {2019},
url = {https://doi.org/10.1109/TCSII.2018.2882388},
doi = {10.1109/TCSII.2018.2882388},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/WangLSFWLLZWCL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cscwd/ZhaoS0T19,
author = {Wei Zhao and
Haihua Shen and
Feng Zhang and
Huazhe Tan},
editor = {Weiming Shen and
Hugo Paredes and
Junzhou Luo and
Jean{-}Paul A. Barth{\`{e}}s},
title = {Adaptive Power Optimization for Mobile Traffic Based on Machine Learning},
booktitle = {23rd {IEEE} International Conference on Computer Supported Cooperative
Work in Design, {CSCWD} 2019, Porto, Portugal, May 6-8, 2019},
pages = {500--505},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/CSCWD.2019.8791501},
doi = {10.1109/CSCWD.2019.8791501},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/cscwd/ZhaoS0T19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/miccai/HuoTZ19,
author = {Qiang Huo and
Geyu Tang and
Feng Zhang},
editor = {Hongen Liao and
Simone Balocco and
Guijin Wang and
Feng Zhang and
Yongpan Liu and
Zijian Ding and
Luc Duong and
Renzo Phellan and
Guillaume Zahnd and
Katharina Breininger and
Shadi Albarqouni and
Stefano Moriconi and
Su{-}Lin Lee and
Stefanie Demirci},
title = {Particle Swarm Optimization for Great Enhancement in Semi-supervised
Retinal Vessel Segmentation with Generative Adversarial Networks},
booktitle = {Machine Learning and Medical Engineering for Cardiovascular Health
and Intravascular Imaging and Computer Assisted Stenting - First International
Workshop, {MLMECH} 2019, and 8th Joint International Workshop, {CVII-STENT}
2019, Held in Conjunction with {MICCAI} 2019, Shenzhen, China, October
13, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11794},
pages = {112--120},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-33327-0\_14},
doi = {10.1007/978-3-030-33327-0\_14},
timestamp = {Sat, 20 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/miccai/HuoTZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smacd/HuoW0L19,
author = {Qiang Huo and
Zhenhua Wu and
Feng Zhang and
Ling Li},
title = {A Modeling Approach for 7nm Technology Node Area-Consuming Circuit
Optimization and Beyond},
booktitle = {16th International Conference on Synthesis, Modeling, Analysis and
Simulation Methods and Applications to Circuit Design, {SMACD} 2019,
Lausanne, Switzerland, July 15-18, 2019},
pages = {93--96},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SMACD.2019.8795254},
doi = {10.1109/SMACD.2019.8795254},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/smacd/HuoW0L19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smacd/ZhangLHFB19,
author = {Feng Zhang and
Linan Li and
Qiang Huo and
Cong Fang and
Wenqiang Ba},
title = {A Fluctuation Model of a Hf02 {RRAM} Cell for Memory Circuit Designs},
booktitle = {16th International Conference on Synthesis, Modeling, Analysis and
Simulation Methods and Applications to Circuit Design, {SMACD} 2019,
Lausanne, Switzerland, July 15-18, 2019},
pages = {209--212},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SMACD.2019.8795257},
doi = {10.1109/SMACD.2019.8795257},
timestamp = {Thu, 31 Oct 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/smacd/ZhangLHFB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/miccai/2019mlmech,
editor = {Hongen Liao and
Simone Balocco and
Guijin Wang and
Feng Zhang and
Yongpan Liu and
Zijian Ding and
Luc Duong and
Renzo Phellan and
Guillaume Zahnd and
Katharina Breininger and
Shadi Albarqouni and
Stefano Moriconi and
Su{-}Lin Lee and
Stefanie Demirci},
title = {Machine Learning and Medical Engineering for Cardiovascular Health
and Intravascular Imaging and Computer Assisted Stenting - First International
Workshop, {MLMECH} 2019, and 8th Joint International Workshop, {CVII-STENT}
2019, Held in Conjunction with {MICCAI} 2019, Shenzhen, China, October
13, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11794},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-33327-0},
doi = {10.1007/978-3-030-33327-0},
isbn = {978-3-030-33326-3},
timestamp = {Sat, 09 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/miccai/2019mlmech.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1905-11207,
author = {Qiang Huo and
Zhenhua Wu and
Weixing Huang and
Xingsheng Wang and
Geyu Tang and
Jiaxin Yao and
Yongpan Liu and
Feng Zhang and
Ling Li and
Ming Liu},
title = {A Novel General Compact Model Approach for 7nm Technology Node Circuit
Optimization from Device Perspective and Beyond},
journal = {CoRR},
volume = {abs/1905.11207},
year = {2019},
url = {http://arxiv.org/abs/1905.11207},
eprinttype = {arXiv},
eprint = {1905.11207},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1905-11207.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1906-06996,
author = {Renjie Lu and
Haihua Shen and
Feng Zhang and
Huawei Li and
Wei Zhao and
Xiaowei Li},
title = {HTDet: {A} Clustering Method using Information Entropy for Hardware
Trojan Detection},
journal = {CoRR},
volume = {abs/1906.06996},
year = {2019},
url = {http://arxiv.org/abs/1906.06996},
eprinttype = {arXiv},
eprint = {1906.06996},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1906-06996.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/ChenCWZ18,
author = {Chengying Chen and
Liming Chen and
Xinghua Wang and
Feng Zhang},
title = {A 0.6V, 8.4uW {AFE} circuit for biomedical signal recording},
journal = {Microelectron. J.},
volume = {75},
pages = {105--112},
year = {2018},
url = {https://doi.org/10.1016/j.mejo.2018.03.009},
doi = {10.1016/J.MEJO.2018.03.009},
timestamp = {Tue, 03 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/ChenCWZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ShenTLZL18,
author = {Haihua Shen and
Huazhe Tan and
Huawei Li and
Feng Zhang and
Xiaowei Li},
title = {LMDet: {A} "Naturalness" Statistical Method for Hardware
Trojan Detection},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {26},
number = {4},
pages = {720--732},
year = {2018},
url = {https://doi.org/10.1109/TVLSI.2017.2781423},
doi = {10.1109/TVLSI.2017.2781423},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ShenTLZL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenCWZ18,
author = {Chengying Chen and
Liming Chen and
Xinghua Wang and
Feng Zhang},
title = {A 66-dB SNDR, 8-{\(\mu\)}W analog front-end for {ECG/EEG} recording
application},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351783},
doi = {10.1109/ISCAS.2018.8351783},
timestamp = {Tue, 03 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ChenCWZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi-dat/ZhangFLHLDCS18,
author = {Feng Zhang and
Dongyu Fan and
Qi{-}Peng Lin and
Qiang Huo and
Yun Li and
Lan Dai and
Cheng{-}Ying Chen and
Haihua Shen},
title = {The application of non-volatile look-up-table operations based on
multilevel-cell of resistance switching random access memory},
booktitle = {2018 International Symposium on {VLSI} Design, Automation and Test
(VLSI-DAT), Hsinchu, Taiwan, April 16-19, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSI-DAT.2018.8373268},
doi = {10.1109/VLSI-DAT.2018.8373268},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi-dat/ZhangFLHLDCS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jzusc/LvLZZSZ17,
author = {Junsheng Lv and
You Li and
Yumei Zhou and
Jianzhong Zhao and
Haihua Shen and
Feng Zhang},
title = {Wide-range tracking technique for process-variation-robust clock and
data recovery applications},
journal = {Frontiers Inf. Technol. Electron. Eng.},
volume = {18},
number = {5},
pages = {729--737},
year = {2017},
url = {https://doi.org/10.1631/FITEE.1500410},
doi = {10.1631/FITEE.1500410},
timestamp = {Thu, 05 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jzusc/LvLZZSZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/LiSLZ17,
author = {Yun Li and
Haihua Shen and
Ce Li and
Feng Zhang},
editor = {Yajie Qin and
Zhiliang Hong and
Ting{-}Ao Tang},
title = {An efficient parity rearrangement coding scheme for {RRAM} thermal
crosstalk effects},
booktitle = {12th {IEEE} International Conference on ASIC, {ASICON} 2017, Guiyang,
China, October 25-28, 2017},
pages = {20--23},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASICON.2017.8252401},
doi = {10.1109/ASICON.2017.8252401},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asicon/LiSLZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ChenCWZ17,
author = {Chengying Chen and
Liming Chen and
Xinghua Wang and
Feng Zhang},
editor = {Yajie Qin and
Zhiliang Hong and
Ting{-}Ao Tang},
title = {A 76{\(\mu\)}W, 58-dB {SNDR} analog front-end chip for implantable
intraocular pressure detection},
booktitle = {12th {IEEE} International Conference on ASIC, {ASICON} 2017, Guiyang,
China, October 25-28, 2017},
pages = {171--174},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASICON.2017.8252439},
doi = {10.1109/ASICON.2017.8252439},
timestamp = {Tue, 03 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/ChenCWZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/QiKLMSYLBHWDMHL17,
author = {Nan Qi and
Yuhang Kang and
Qipeng Lin and
Jianxu Ma and
Jingbo Shi and
Bozhi Yin and
Chang Liu and
Rui Bai and
Shang Hu and
Juncheng Wang and
Jiangbing Du and
Lin Ma and
Zuyuan He and
Ming Liu and
Feng Zhang and
Patrick Yin Chiang},
title = {A 51Gb/s, 320mW, {PAM4} {CDR} with baud-rate sampling for high-speed
optical interconnects},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2017, Seoul,
Korea (South), November 6-8, 2017},
pages = {89--92},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASSCC.2017.8240223},
doi = {10.1109/ASSCC.2017.8240223},
timestamp = {Tue, 09 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asscc/QiKLMSYLBHWDMHL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/ZhangFDLFLHDCBL17,
author = {Feng Zhang and
Dongyu Fan and
Yuan Duan and
Jin Li and
Cong Fang and
Yun Li and
Xiaowei Han and
Lan Dai and
Cheng{-}Ying Chen and
Jinshun Bi and
Ming Liu and
Meng{-}Fan Chang},
title = {A 130nm 1Mb HfOx embedded {RRAM} macro using self-adaptive peripheral
circuit system techniques for 1.6X work temperature range},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2017, Seoul,
Korea (South), November 6-8, 2017},
pages = {173--176},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASSCC.2017.8240244},
doi = {10.1109/ASSCC.2017.8240244},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asscc/ZhangFDLFLHDCBL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/HanJSWWCZXDWXPZ17,
author = {Xiaowei Han and
Qian Jia and
Hongbin Sun and
Longfei Wang and
Huaqiang Wu and
Yimao Cai and
Feng Zhang and
Yongyi Xie and
Fangxu Dong and
Xiaoguang Wang and
Xiaofei Xue and
Li Pang and
Xiaoqing Zhao and
Mengnan Wu and
Pu Bai and
Qi Liu and
Hangbing Lv and
Bing Yu and
Chao Zhao and
He Qian and
Ru Huang and
Ming Liu and
Yumei Zhou and
Nanning Zheng and
Qiwei Ren},
title = {A 0.13{\(\mu\)}m 64Mb HfOx ReRAM using configurable ramped voltage
write and low read-disturb sensing techniques for reliability improvement},
booktitle = {2017 {IEEE} Custom Integrated Circuits Conference, {CICC} 2017, Austin,
TX, USA, April 30 - May 3, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/CICC.2017.7993685},
doi = {10.1109/CICC.2017.7993685},
timestamp = {Wed, 26 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/HanJSWWCZXDWXPZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/ChenSSZ16,
author = {Cheng{-}Ying Chen and
Hongbin Sun and
Haihua Shen and
Feng Zhang},
title = {A 128 Kb HfO\({}_{\mbox{2}}\) ReRAM with Novel Double-Reference and
Dynamic-Tracking scheme for write yield improvement},
journal = {{IEICE} Electron. Express},
volume = {13},
number = {6},
pages = {20160061},
year = {2016},
url = {https://doi.org/10.1587/elex.13.20160061},
doi = {10.1587/ELEX.13.20160061},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/ChenSSZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenCFYYHHZ16,
author = {Chengying Chen and
Liming Chen and
Jun Fan and
Zenghui Yu and
Jun Yang and
Xiaoyu Hu and
Yong Hei and
Feng Zhang},
title = {A 1V, 1.1mW mixed-signal hearing aid SoC in 0.13{\(\mu\)}m {CMOS}
process},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2016,
Montr{\'{e}}al, QC, Canada, May 22-25, 2016},
pages = {225--228},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISCAS.2016.7527211},
doi = {10.1109/ISCAS.2016.7527211},
timestamp = {Tue, 03 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ChenCFYYHHZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ZhangJC15,
author = {Feng Zhang and
Hao Ju and
Chengying Chen},
title = {A {PVT} variation tolerant and low power 5Gb/s clock and data recovery
circuit for {PCI-E} 2.0/USB 3.0},
booktitle = {2015 {IEEE} 11th International Conference on ASIC, {ASICON} 2015,
Chengdu, China, November 3-6, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ASICON.2015.7517057},
doi = {10.1109/ASICON.2015.7517057},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asicon/ZhangJC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/LiZZ13,
author = {You Li and
Feng Zhang and
Yumei Zhou},
title = {A novel equalizer for the high-loss backplane at Nyquist frequency},
booktitle = {{IEEE} 10th International Conference on ASIC, {ASICON} 2013, Shenzhen,
China, October 28-31, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASICON.2013.6811893},
doi = {10.1109/ASICON.2013.6811893},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asicon/LiZZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenLJWSZ12,
author = {Shuai Chen and
Hao Li and
Kai Jia and
Yue Wang and
Xiaobing Shi and
Feng Zhang},
title = {A fast-lock-in wide-range harmonic-free all-digital {DLL} with a complementary
delay line},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {1803--1806},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271616},
doi = {10.1109/ISCAS.2012.6271616},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenLJWSZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispacs/LiuWZZLL12,
author = {Qihao Liu and
Huihui Weng and
Feng Zhang and
Jianzhong Zhao and
Junsheng Lv and
You Li},
title = {An efficient physical coding sublayer for {PCI} express in 65nm {CMOS}},
booktitle = {International Symposium on Intelligent Signal Processing and Communications
Systems, {ISPACS} 2012, Tamsui, New Taipei City, Taiwan, November
4-7, 2012},
pages = {625--629},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISPACS.2012.6473565},
doi = {10.1109/ISPACS.2012.6473565},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/ispacs/LiuWZZLL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BaiWXZYHC11,
author = {Rui Bai and
Jingguang Wang and
Lingli Xia and
Feng Zhang and
Zongren Yang and
Weiwu Hu and
Patrick Chiang},
title = {Sinusoidal Clock Sampling for Multigigahertz ADCs},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {58-I},
number = {12},
pages = {2808--2815},
year = {2011},
url = {https://doi.org/10.1109/TCSI.2011.2157742},
doi = {10.1109/TCSI.2011.2157742},
timestamp = {Fri, 03 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/BaiWXZYHC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenYJZG11,
author = {Shuai Chen and
Liqiong Yang and
Hua Jing and
Feng Zhang and
Zhuo Gao},
title = {A novel {SST} transmitter with mutually decoupled impedance self-calibration
and equalization},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {173--176},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937529},
doi = {10.1109/ISCAS.2011.5937529},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenYJZG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GaoYCYZ09,
author = {Zhuo Gao and
Hang Yu and
Patrick Chiang and
Yi Yang and
Feng Zhang},
title = {A 10Gb/s Wire-line Transceiver with Half Rate Period Calibration {CDR}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {1827--1830},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5118133},
doi = {10.1109/ISCAS.2009.5118133},
timestamp = {Fri, 03 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/GaoYCYZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/ZhangYFCHH08,
author = {Feng Zhang and
Zongren Yang and
Wei Feng and
Hao Cui and
Lingyi Huang and
Weiwu Hu},
title = {A High Speed {CMOS} Transmitter and Rail-to-Rail Receiver},
booktitle = {4th {IEEE} International Symposium on Electronic Design, Test and
Applications, {DELTA} 2008, Hong Kong, January 23-25, 2008},
pages = {67--70},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DELTA.2008.32},
doi = {10.1109/DELTA.2008.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/delta/ZhangYFCHH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/LiuWZLW06,
author = {Yongpan Liu and
Yu Wang and
Feng Zhang and
Rong Luo and
Hui Wang},
title = {A New Thermal-Conscious System-Level Methodology for Energy-Efficient
Processor Voltage Selection},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {968--971},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342223},
doi = {10.1109/APCCAS.2006.342223},
timestamp = {Sat, 09 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/apccas/LiuWZLW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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