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2010 – today
- 2018
[j13]Debayan Das, Shovan Maity, Saad Bin Nasir, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
ASNI: Attenuated Signature Noise Injection for Low-Overhead Power Side-Channel Attack Immunity. IEEE Trans. on Circuits and Systems 65-I(10): 3300-3311 (2018)- [c25]Danilo Sijacic, Josep Balasch, Bohan Yang, Santosh Ghosh, Ingrid Verbauwhede:
Towards Efficient and Automated Side Channel Evaluations at Design Time. PROOFS@CHES 2018: 16-31 - [c24]Tanay Karnik, Dileep Kurian, Paolo A. Aseron, Richard Dorrance, Erkan Alpman, Angela Nicoara, Roman Popov, Leonid Azarenkov, Mikhail J. Moiseev, Li Zhao, Santosh Ghosh, Rafael Misoczki, Ankit Gupta, M. Akhila, Sriram Muthukumar, Saurabh Bhandari, Satish Yada, Kartik Jain, Robert Flory, Chanitnan Kanthapanit, Eduardo Quijano, Bradley Jackson, Hao Luo, Suhwan Kim, Vaibhav Vaidya, Adel Elsherbini, Renzhi Liu, Farhana Sheikh, Omesh Tickoo, Ilya Klotchkov, Manoj R. Sastry, Sheldon Sun, Mukesh Bhartiya, Anuradha Srinivasan, Yatin Hoskote, Hong Wang, Vivek De:
A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS. ISSCC 2018: 46-48 - [i5]Monodeep Kar, Arvind Singh, Sanu Mathew, Santosh Ghosh, Anand Rajan, Vivek De, Raheem A. Beyah, Saibal Mukhopadhyay:
Blindsight: Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator. CoRR abs/1802.09096 (2018) - [i4]Debayan Das, Mayukh Nath, Baibhab Chatterjee, Santosh Ghosh, Shreyas Sen:
Ground-up Root-cause Analysis guided Low-Overhead Generic Countermeasure for Electro-Magnetic Side-Channel Attack. IACR Cryptology ePrint Archive 2018: 620 (2018) - 2017
- [j12]Rajat Sadhukhan, Sikhar Patranabis, Ashrujit Ghoshal, Debdeep Mukhopadhyay, Vishal Saraswat, Santosh Ghosh:
An Evaluation of Lightweight Block Ciphers for Resource-Constrained Applications: Area, Performance, and Security. J. Hardware and Systems Security 1(3): 203-218 (2017) - [c23]Debayan Das, Shovan Maity, Saad Bin Nasir, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
High efficiency power side-channel attack immunity using noise injection in attenuated signature domain. HOST 2017: 62-67 - [c22]Santosh Ghosh, Rafael Misoczki, Li Zhao, Manoj R. Sastry:
Lightweight Block Cipher Circuits for Automotive and IoT Sensor Devices. HASP@ISCA 2017: 5:1-5:7 - [c21]Ayon Chakraborty, Arani Bhattacharya, Santosh Ghosh, Samir R. Das:
A first look at performance of TV streaming sticks. Sarnoff Symposium 2017: 1-6 - [i3]Debayan Das, Shovan Maity, Saad Bin Nasir, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen:
High Efficiency Power Side-Channel Attack Immunity using Noise Injection in Attenuated Signature Domain. CoRR abs/1703.10328 (2017) - 2016
- [c20]Sikhar Patranabis, Debapriya Basu Roy, Yash Shrivastava, Debdeep Mukhopadhyay, Santosh Ghosh:
Parsimonious design strategy for linear layers with high diffusion in block ciphers. HOST 2016: 31-36 - [c19]Sikhar Patranabis, Debapriya Basu Roy, Praveen Kumar Vadnala, Debdeep Mukhopadhyay, Santosh Ghosh:
Shuffling across rounds: A lightweight strategy to counter side-channel attacks. ICCD 2016: 440-443 - 2015
- [i2]Santosh Ghosh, Amit Kumar, Amitabh Das, Ingrid Verbauwhede:
On the Implementation of Unified Arithmetic on Binary Huff Curves. IACR Cryptology ePrint Archive 2015: 423 (2015) - 2014
- [j11]Vinod Kumar Yadav, Niranjan Kumar, Santosh Ghosh, Kanwardeep Singh:
Indian thermal power plant challenges and remedies via application of modified data envelopment analysis. ITOR 21(6): 955-977 (2014) - [j10]Santosh Ghosh, Ingrid Verbauwhede:
BLAKE-512-Based 128-Bit CCA2 Secure Timing Attack Resistant McEliece Cryptoprocessor. IEEE Trans. Computers 63(5): 1124-1133 (2014) - [c18]Santosh Ghosh:
On the implementation of mceliece with CCA2 indeterminacy by SHA-3. ISCAS 2014: 2804-2807 - 2013
- [j9]Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede:
Secure JTAG Implementation Using Schnorr Protocol. J. Electronic Testing 29(2): 193-209 (2013) - [j8]Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta:
First-order DPA Vulnerability of Rijndael: Security and Area-delay Optimization Trade-off. I. J. Network Security 15(3): 219-230 (2013) - [j7]Amitabh Das, Baris Ege, Santosh Ghosh, Lejla Batina, Ingrid Verbauwhede:
Security Analysis of Industrial Test Compression Schemes. IEEE Trans. on CAD of Integrated Circuits and Systems 32(12): 1966-1977 (2013) - [j6]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Secure Dual-Core Cryptoprocessor for Pairings Over Barreto-Naehrig Curves on FPGA Platform. IEEE Trans. VLSI Syst. 21(3): 434-442 (2013) - [c17]Santosh Ghosh, Amit Kumar, Amitabh Das, Ingrid Verbauwhede:
On the Implementation of Unified Arithmetic on Binary Huff Curves. CHES 2013: 349-364 - 2012
- [j5]Jean DaRolt, Amitabh Das, Santosh Ghosh, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede:
Scan attacks on side-channel and fault attack resistant public-key implementations. J. Cryptographic Engineering 2(4): 207-219 (2012) - [c16]Santosh Ghosh, Jeroen Delvaux, Leif Uhsadel, Ingrid Verbauwhede:
A Speed Area Optimized Embedded Co-processor for McEliece Cryptosystem. ASAP 2012: 102-108 - [c15]Baris Ege, Amitabh Das, Santosh Ghosh, Ingrid Verbauwhede:
Differential Scan Attack on AES with X-tolerant and X-masked Test Response Compactor. DSD 2012: 545-552 - [c14]Santosh Ghosh, Ingrid Verbauwhede, Dipanwita Roy Chowdhury:
Core Based Architecture to Speed Up Optimal Ate Pairing on FPGA Platform. Pairing 2012: 141-159 - [c13]Arpan Mondal, Santosh Ghosh, Abhijit Das, Dipanwita Roy Chowdhury:
Efficient FPGA Implementation of Montgomery Multiplier Using DSP Blocks. VDAT 2012: 370-372 - 2011
- [j4]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Fault Attack, Countermeasures on Pairing Based Cryptography. I. J. Network Security 12(1): 21-28 (2011) - [j3]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Petrel: Power and Timing Attack Resistant Elliptic Curve Scalar Multiplier Based on Programmable GF(p) Arithmetic Unit. IEEE Trans. on Circuits and Systems 58-I(8): 1798-1812 (2011) - [c12]Santosh Ghosh, Dipanwita Roy Chowdhury, Abhijit Das:
High Speed Cryptoprocessor for η T Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields. CHES 2011: 442-458 - [c11]Santosh Ghosh, Dipanwita Roy Chowdhury:
Security of Prime Field Pairing Cryptoprocessor against Differential Power Attack. InfoSecHiComNet 2011: 16-29 - [c10]Santosh Ghosh:
Design and Analysis of Pairing Based Cryptographic Hardware for Prime Fields. ISVLSI 2011: 363-364 - [i1]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
Security of Prime Field Pairing Cryptoprocessor Against Differential Power Attack. IACR Cryptology ePrint Archive 2011: 181 (2011) - 2010
- [c9]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
High speed Fp multipliers and adders on FPGA platform. DASIP 2010: 21-26 - [c8]Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury:
High Speed Flexible Pairing Cryptoprocessor on FPGA Platform. Pairing 2010: 450-466
2000 – 2009
- 2009
- [j2]Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, Indranil Sengupta:
Parallel crypto-devices for GF(p) elliptic curve multiplication resistant against side channel attacks. Computers & Electrical Engineering 35(2): 329-338 (2009) - [j1]Monjur Alam, Santosh Ghosh, M. J. Mohan, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, Indranil Sengupta:
Effect of glitches against masked AES S-box implementation and countermeasure. IET Information Security 3(1): 34-44 (2009) - 2008
- [c7]Santosh Ghosh, Monjur Alam, Dipanwita Roy Chowdhury, Indranil Sengupta:
A GF(p) elliptic curve group operator resistant against side channel attacks. ACM Great Lakes Symposium on VLSI 2008: 53-58 - [c6]Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta:
Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. VLSI Design 2008: 693-698 - 2007
- [c5]Monjur Alam, Sonai Ray, Debdeep Mukhopadhyay, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta:
An area optimized reconfigurable encryptor for AES-Rijndael. DATE 2007: 1116-1121 - [c4]Santosh Ghosh, Monjur Alam, Indranil Sengupta, Dipanwita Roy Chowdhury:
A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography. DSD 2007: 109-115 - [c3]Avishek Saha, Santosh Ghosh:
A Speed-Area Optimization of Full Search Block Matching Hardware with Applications in High-Definition TVs (HDTV). HiPC 2007: 83-94 - [c2]Santosh Ghosh, Avishek Saha:
Speed-area optimized FPGA implementation for Full Search Block Matching. ICCD 2007: 13-18 - [c1]Avishek Saha, Santosh Ghosh, Shamik Sural, Jayanta Mukherjee:
Toward Memory-efficient Design of Video Encoders for Multimedia Applications. ISVLSI 2007: 453-454
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