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ORCIDLeopold Haller
Person information
- affiliation: Google Inc., San Francisco, USA
- affiliation (PhD 2013): University of Oxford, UK
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2010 – 2019
- 2017
[c12]Rajdeep Mukherjee, Peter Schrammel
, Leopold Haller, Daniel Kroening, Tom Melham:
Lifting CDCL to Template-Based Abstract Domains for Program Verification. ATVA 2017: 307-326- [i1]Rajdeep Mukherjee, Peter Schrammel, Leopold Haller, Daniel Kroening, Tom Melham:
Lifting CDCL to Template-based Abstract Domains for Program Verification. CoRR abs/1707.02011 (2017) - 2014
- [j2]Martin Brain, Vijay Victor D'Silva, Alberto Griggio, Leopold Haller, Daniel Kroening:
Deciding floating-point logic with abstract conflict driven clause learning. Formal Methods Syst. Des. 45(2): 213-245 (2014) - [c11]Vijay Victor D'Silva, Leopold Haller, Daniel Kroening:
Abstract satisfaction. POPL 2014: 139-150 - 2013
- [b1]Leopold Carl Robert Haller:
Abstract satisfaction. University of Oxford, UK, 2013 - [c10]Vijay Victor D'Silva, Leopold Haller, Daniel Kroening:
Abstract conflict driven learning. POPL 2013: 143-154 - [c9]Martin Brain, Vijay Victor D'Silva, Alberto Griggio, Leopold Haller, Daniel Kroening:
Interpolation-Based Verification of Floating-Point Programs with Abstract CDCL. SAS 2013: 412-432 - [c8]Martin Brain, Vijay Victor D'Silva, Leopold Haller, Alberto Griggio, Daniel Kroening:
An Abstract Interpretation of DPLL(T). VMCAI 2013: 455-475 - 2012
- [c7]Leopold Haller, Alberto Griggio, Martin Brain, Daniel Kroening:
Deciding floating-point logic with systematic abstraction. FMCAD 2012: 131-140 - [c6]Vijay Victor D'Silva, Leopold Haller, Daniel Kroening:
Satisfiability Solvers Are Static Analysers. SAS 2012: 317-333 - [c5]Vijay Victor D'Silva, Leopold Haller, Daniel Kroening, Michael Tautschnig:
Numeric Bounds Analysis with Conflict-Driven Learning. TACAS 2012: 48-63 - 2011
- [c4]Alastair F. Donaldson, Leopold Haller, Daniel Kroening, Philipp Rümmer:
Software Verification Using k-Induction. SAS 2011: 351-368 - [c3]Alastair F. Donaldson, Leopold Haller, Daniel Kroening:
Strengthening Induction-Based Race Checking with Lightweight Static Analysis. VMCAI 2011: 169-183 - 2010
- [j1]Uwe Egly, Leopold Haller:
A SAT Solver for Circuits Based on the Tableau Method. Künstliche Intell. 24(1): 15-23 (2010) - [c2]Leopold Haller, Satnam Singh:
Relieving capacity limits on FPGA-based SAT-solvers. FMCAD 2010: 217-220
2000 – 2009
- 2009
- [c1]Yury Chebiryak, Thomas Wahl, Daniel Kroening, Leopold Haller:
Finding Lean Induced Cycles in Binary Hypercubes. SAT 2009: 18-31
Coauthor Index
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last updated on 2023-09-27 22:54 CEST by the dblp team
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