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ORCIDQiyuan Liu 0001
Person information
- affiliation: Qualcomm, Tempe, AZ, USA
- affiliation (PhD 2017): Texas A&M University, College Station, TX, USA
Other persons with the same name
- Qiyuan Liu — disambiguation page
- Qiyuan Liu 0002
![[0000-0002-0000-7259]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-0000-7259")
— University of Illinois at Urbana-Champaign, Graduate School of Library and Information Science, IL, USA - Qiyuan Liu 0003 — Tongji University, MoE Key Laboratory of Road and Traffic Engineering, Shanghai, China
- Qiyuan Liu 0004 — Beijing Information Science and Technology University, Beijing Key Laboratory of Internet Culture and Digital Dissemination Research / School of Computer Science, China
- Qiyuan Liu 0005 — Soochow University, School of Computer Science and Technology, Suzhou, China
- Qiyuan Liu 0006 — Gannan Normal University, The Communist Party of China Revolutionary Spirit and Cultural Resources Research Center, Ganzhou, China
- Qiyuan Liu 0007 — People's Public Security University of China, Beijing, China
- Qiyuan Liu 0008 — CAS Key Laboratory of Technology in GIPAS, University of Science and Technology of China
- Qiyuan Liu 0009 — Chongqing University of Technology, College of Artificial Intelligent, China
- Qiyuan Liu 0010 — Central South University, School of Computer Science, Changsha, China
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2020 – today
- 2020
[j7]Dadian Zhou, Junning Jiang, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator. IEEE J. Solid State Circuits 55(8): 2140-2150 (2020)
2010 – 2019
- 2019
- [j6]Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3373-3383 (2019) - 2018
- [j5]Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. IEEE J. Solid State Circuits 53(11): 3280-3292 (2018) - [j4]Qiyuan Liu, Alexander Edward, Dadian Zhou, José Silva-Martínez:
A Continuous-Time MASH 1-1-1 Delta-Sigma Modulator With FIR DAC and Encoder-Embedded Loop-Unrolling Quantizer in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 26(4): 756-767 (2018) - [c3]Eric Cope, Julian Aschieri, Tony Lai, Franklin Zhao, Walter Grandfield, Michael Clifford, Pete Rathfelder, Qiyuan Liu, Siddartha Kavilipati, Aaron Vandergriff, Gerald Miaille:
A 2×20W 0.0013% THD+N Class-D audio amplifier with consistent performance up to maximum power level. ISSCC 2018: 56-58 - 2017
- [j3]Alexander Edward, Qiyuan Liu, Carlos Briseno-Vidrios, Martin Kinyua, Eric G. Soenen, Aydin Ilker Karsilayan, José Silva-Martínez:
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. IEEE J. Solid State Circuits 52(2): 448-459 (2017) - [j2]Qiyuan Liu, Alexander Edward, Martin Kinyua, Eric G. Soenen, José Silva-Martínez:
A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques. IEEE J. Solid State Circuits 52(6): 1591-1604 (2017) - [c2]Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, José Silva-Martínez:
A 13bit 200MS/S pipeline ADC with current-mode MDACs. ISCAS 2017: 1-4 - [c1]Qiyuan Liu, Alexander Edward, Carlos Briseno-Vidrios, Negar Rashidi, José Silva-Martínez:
High-performance continuous-time MASH sigma-delta ADCs for broadband wireless applications. MWSCAS 2017: 297-300 - 2016
- [j1]Haoyu Qian, Qiyuan Liu, José Silva-Martínez, Sebastian Hoyos:
A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS. IEEE J. Solid State Circuits 51(3): 587-597 (2016)
Coauthor Index
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