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2010 – today
- 2019
[j25]Antoniette Mondigo, Tomohiro Ueno, Kentaro Sano, Hiroyuki Takizawa:
Scalability Analysis of Deeply Pipelined Tsunami Simulation with Multiple FPGAs. IEICE Transactions 102-D(5): 1029-1036 (2019)- [c77]Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa:
The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems. COOL CHIPS 2019: 1-3 - [c76]Jens Huthmann, Shin Abiko, Artur Podobas, Kentaro Sano, Hiroyuki Takizawa:
Scaling Performance for N-Body Stream Computation with a Ring of FPGAs. HEART 2019: 10:1-10:6 - [c75]Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa:
An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems. MCSoC 2019: 17-24 - 2018
- [j24]Hang Cui, Shoichi Hirasawa, Hiroaki Kobayashi, Hiroyuki Takizawa:
A Machine Learning-Based Approach for Selecting SpMV Kernels and Matrix Storage Formats. IEICE Transactions 101-D(9): 2307-2314 (2018) - [c74]Antoniette Mondigo, Kentaro Sano, Hiroyuki Takizawa:
Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple FPGAs with High-speed Communication Subsystem. ASAP 2018: 1-4 - [c73]Zhen Wang, Mulya Agung, Ryusuke Egawa, Reiji Suda, Hiroyuki Takizawa:
Automatic Hyperparameter Tuning of Machine Learning Models under Time Constraints. BigData 2018: 4967-4973 - [c72]Muhammad Alfian Amrizal, Pei Li, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa:
A Failure Prediction-Based Adaptive Checkpointing Method with Less Reliance on Temperature Monitoring for HPC Applications. CLUSTER 2018: 515-523 - [c71]Antoniette Mondigo, Kentaro Sano, Hiroyuki Takizawa:
Enhancing Memory Bandwidth in a Single Stream Computation with Multiple FPGAs. FPT 2018: 378-380 - [c70]Xiong Xiao, Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa:
Investigating the Effects of Dynamic Thread Team Size Adjustment for Irregular Applications. CANDAR 2018: 76-84 - [c69]Kenya Yamada, Takahiro Katagiri, Hiroyuki Takizawa, Kazuo Minami, Mitsuo Yokokawa
, Toru Nagai, Masao Ogino:
Preconditioner Auto-Tuning Using Deep Learning for Sparse Iterative Algorithms. CANDAR Workshops 2018: 257-262 - [c68]Yuki Kawarabatake, Mulya Agung, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa:
Use of Code Structural Features for Machine Learning to Predict Effective Optimizations. IPDPS Workshops 2018: 1049-1055 - 2017
- [j23]Muhammad Alfian Amrizal, Atsuya Uno, Yukinori Sato, Hiroyuki Takizawa, Hiroaki Kobayashi:
Energy-Performance Modeling of Speculative Checkpointing for Exascale Systems. IEICE Transactions 100-D(12): 2749-2760 (2017) - [j22]Xiong Xiao, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Toward Dynamic Load Balancing across OpenMP Thread Teams for Irregular Workloads. IJNC 7(2): 387-404 (2017) - [j21]Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Directive Generation Approach to High Code-Maintainability for Various HPC Systems. IJNC 7(2): 405-418 (2017) - [j20]Ryusuke Egawa, Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE. The Journal of Supercomputing 73(9): 3948-3976 (2017) - [c67]Hiroyuki Takizawa, Thorsten Reimann, Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Akihiro Musa, Hiroaki Kobayashi:
Vectorization-Aware Loop Optimization with User-Defined Code Transformations. CLUSTER 2017: 685-692 - [c66]Ryusuke Egawa, Kazuhiko Komatsu, Yoko Isobe, Toshihiro Kato, Souya Fujimoto, Hiroyuki Takizawa, Akihiro Musa, Hiroaki Kobayashi:
Performance and Power Analysis of SX-ACE Using HP-X Benchmark Programs. CLUSTER 2017: 693-700 - [c65]Mulya Agung, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa:
A Memory Congestion-Aware MPI Process Placement for Modern NUMA Systems. HiPC 2017: 152-161 - [c64]Ryusuke Egawa, Kazuhiko Komatsu, Hiroyuki Takizawa:
Designing an Open Database of System-Aware Code Optimizations. CANDAR 2017: 369-374 - [c63]Hiroyuki Takizawa, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa:
An Application-Level Incremental Checkpointing Mechanism with Automatic Parameter Tuning. CANDAR 2017: 389-394 - [c62]Hiroyuki Takizawa, Daichi Sato, Shoichi Hirasawa, Daisuke Takahashi:
A Customizable Auto-Tuning Scenario with User-Defined Code Transformations. IPDPS Workshops 2017: 1372-1378 - [c61]Muhammad Alfian Amrizal, Hiroyuki Takizawa:
Optimizing Energy Consumption on HPC Systems with a Multi-Level Checkpointing Mechanism. NAS 2017: 1-9 - 2016
- [j19]Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'ichi Itakura, Hiroaki Kobayashi:
Translation of Large-Scale Simulation Codes for an OpenACC Platform Using the Xevolver Framework. IJNC 6(2): 167-180 (2016) - [j18]Reiji Suda, Hiroyuki Takizawa, Shoichi Hirasawa:
Xevtgen: Fortran code transformer generator for high performance scientific codes. IJNC 6(2): 263-289 (2016) - [c60]Masayuki Sato, Shin Nishimura, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A cache partitioning mechanism to protect shared data for CMPs. COOL Chips 2016: 1-2 - [c59]Yasuharu Hayashi, Hiroyuki Takizawa, Hiroaki Kobayashi:
A User-Defined Code Transformation Approach to Overlapping MPI Communication with Computation. CANDAR 2016: 508-514 - [c58]Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Directive Generation Approach Using User-Defined Rules. CANDAR 2016: 515-521 - [c57]Reiji Suda, Hiroyuki Takizawa:
Xevdriver: A Software System Supporting XML-based Source-to-Source Code Transformations on Fortran Programs. CANDAR 2016: 522-528 - [c56]Xiong Xiao, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
The Importance of Dynamic Load Balancing among OpenMP Thread Teams for Irregular Workloads. CANDAR 2016: 529-535 - [c55]Hang Cui, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Code Selection Mechanism Using Deep Learning. MCSoC 2016: 385-392 - 2015
- [j17]Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
FLEXII: A Flexible Insertion Policy for Dynamic Cache Resizing Mechanisms. IEICE Transactions 98-C(7): 550-558 (2015) - [j16]Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Light-Weight Rollback Mechanism for Testing Kernel Variants in Auto-Tuning. IEICE Transactions 98-D(12): 2178-2186 (2015) - [j15]Chunyan Wang, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Identification and Elimination of Platform-Specific Code Smells in High Performance Computing Applications. IJNC 5(1): 180-199 (2015) - [j14]Hiroyuki Takizawa, Shoichi Hirasawa, Makoto Sugawara, Isaac Gelado, Hiroaki Kobayashi, Wen-mei W. Hwu:
Optimized Data Transfers Based on the OpenCL Event Management Mechanism. Scientific Programming 2015: 576498:1-576498:16 (2015) - [c54]Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
An energy-efficient dynamic memory address mapping mechanism. COOL Chips 2015: 1-3 - [c53]Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Verification Framework for Streamlining Empirical Auto-Tuning. CANDAR 2015: 508-514 - [c52]Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'ichi Itakura, Hiroaki Kobayashi:
Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework. CANDAR 2015: 515-520 - [c51]Reiji Suda, Hiroyuki Takizawa, Shoichi Hirasawa:
Xevtgen: Fortran Code Transformer Generator for High Performance Scientific Codes. CANDAR 2015: 528-534 - [c50]Takeshi Yamada, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Case Study of User-Defined Code Transformations for Data Layout Optimizations. CANDAR 2015: 535-541 - 2014
- [j13]Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications. IEICE Transactions 97-D(11): 2835-2843 (2014) - [c49]Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
On-chip checkpointing with 3D-stacked memories. 3DIC 2014: 1-6 - [c48]Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
An energy optimization method for vector processing mechanisms. COOL Chips 2014: 1-3 - [c47]Hiroyuki Takizawa, Shoichi Hirasawa, Yasuharu Hayashi, Ryusuke Egawa, Hiroaki Kobayashi:
Xevolver: An XML-based code translation framework for supporting HPC application migration. HiPC 2014: 1-11 - [c46]Chunyan Wang, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Platform-Specific Code Smell Alert System for High Performance Computing Applications. IPDPS Workshops 2014: 652-661 - [c45]Xiong Xiao, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
An Approach to Customization of Compiler Directives for Application-Specific Code Transformations. MCSoC 2014: 99-106 - [c44]Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Compiler-Assisted OpenMP Migration Method Based on Automatic Parallelizing Information. ISC 2014: 450-459 - [c43]Alfian Amrizal, Shoichi Hirasawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Automatic Parameter Tuning of Hierarchical Incremental Checkpointing. VECPAR 2014: 298-309 - 2013
- [j12]Masataka Moriya, Hiroyuki Takizawa, Yoshinao Mizugaki:
Balanced Ternary Quantum Voltage Generator Based on Zero Crossing Shapiro Steps in Asymmetric Two-Junction SQUIDs. IEICE Transactions 96-C(3): 334-337 (2013) - [j11]Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts. IEICE Transactions 96-D(9): 2047-2054 (2013) - [c42]Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A flexible insertion policy for dynamic cache resizing mechanisms. COOL Chips 2013: 1-3 - [c41]Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Design and evaluation of a media-oriented vector processor with a multi-banked cache memory. ESTImedia 2013: 78-87 - [c40]Hiroyuki Takizawa, Makoto Sugawara, Shoichi Hirasawa, Isaac Gelado, Hiroaki Kobayashi, Wen-mei W. Hwu:
clMPI: An OpenCL Extension for Interoperation with the Message Passing Interface. IPDPS Workshops 2013: 1138-1148 - 2012
- [c39]Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
An out-of-order vector processing mechanism for multimedia applications. Conf. Computing Frontiers 2012: 233-236 - [c38]Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A capacity-efficient insertion policy for dynamic cache resizing mechanisms. Conf. Computing Frontiers 2012: 265-268 - [c37]Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A media-oriented vector architectural extension with a high bandwidth cache system. COOL Chips 2012: 1-3 - [c36]Mamoru Miura, Kinya Fudano, Koichi Ito, Takafumi Aoki, Hiroyuki Takizawa, Hiroaki Kobayashi:
GPU implementation of phase-based stereo correspondence and its application. ICIP 2012: 1697-1700 - [c35]Ryusuke Egawa, Jubee Tada, Yusuke Endo, Hiroyuki Takizawa, Hiroaki Kobayashi:
Abstract: Exploring Design Space of a 3D Stacked Vector Cache. SC Companion 2012: 1475-1476 - [c34]Ryusuke Egawa, Jubee Tada, Yusuke Endo, Hiroyuki Takizawa, Hiroaki Kobayashi:
Poster: Exploring Design Space of a 3D Stacked Vector Cache - Designing a 3D Stacked Vector Cache using Conventional EDA Tools. SC Companion 2012: 1477 - 2011
- [j10]Ling Xu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Network Clustering Algorithm for Sybil-Attack Resisting. IEICE Transactions 94-D(12): 2345-2352 (2011) - [j9]Tsutomu Inaba, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Self-Organized Overlay Network Management Mechanism for Heterogeneous Environments. JIP 19: 25-38 (2011) - [j8]Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Power-Aware Dynamic Cache Partitioning for CMPs. Trans. HiPEAC 3: 135-153 (2011) - [c33]Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Yusuke Endo, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Effects of 3-D stacked vector cache on energy consumption. 3DIC 2011: 1-6 - [c32]Akira Nukada, Hiroyuki Takizawa, Satoshi Matsuoka:
NVCR: A Transparent Checkpoint-Restart Library for NVIDIA CUDA. IPDPS Workshops 2011: 104-113 - [c31]Hiroyuki Takizawa, Kentaro Koyama, Katsuto Sato, Kazuhiko Komatsu, Hiroaki Kobayashi:
CheCL: Transparent Checkpointing and Process Migration of OpenCL Applications. IPDPS 2011: 864-876 - [c30]Katsuto Sato, Kazuhiko Komatsu, Hiroyuki Takizawa, Hiroaki Kobayashi:
A History-Based Performance Prediction Model with Profile Data Classification for Automatic Task Allocation in Heterogeneous Computing Systems. ISPA 2011: 135-142 - 2010
- [c29]Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Design and early evaluation of a 3-D die stacked chip multi-vector processor. 3DIC 2010: 1-8 - [c28]Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
Cache partitioning strategies for 3-D stacked vector processors. 3DIC 2010: 1-6 - [c27]Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Load-Forwarding Mechanism for the Vector Architecture in Multimedia Applications. DSD 2010: 412-415 - [c26]Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Majority-Based Control Scheme for Way-Adaptable Caches. Facing the Multicore-Challenge 2010: 16-28 - [c25]Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A voting-based working set assessment scheme for dynamic cache resizing mechanisms. ICCD 2010: 98-105 - [c24]Ling Xu, Chainan Satayapiwat, Hiroyuki Takizawa, Hiroaki Kobayashi:
Resisting Sybil Attack By Social Network and Network Clustering. SAINT 2010: 15-21 - [p1]Katsuto Sato, Hiroyuki Takizawa, Kazuhiko Komatsu, Hiroaki Kobayashi:
Automatic Tuning of CUDA Execution Parameters for Stencil Processing. Software Automatic Tuning, From Concepts to State-of-the-Art Results 2010: 209-228
2000 – 2009
- 2009
- [j7]Hiroyuki Takizawa, Tatsuya Chida, Hiroaki Kobayashi:
Evaluating Computational Performance of Backpropagation Learning on Graphics Hardware. Electr. Notes Theor. Comput. Sci. 225: 379-389 (2009) - [j6]Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Performance Study of Secure Data Mining on the Cell Processor. IJGHPC 1(2): 30-44 (2009) - [c23]Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
3D on-chip memory for the vector architecture. 3DIC 2009: 1-6 - [c22]Hiroyuki Takizawa, Katsuto Sato, Kazuhiko Komatsu, Hiroaki Kobayashi:
CheCUDA: A Checkpoint/Restart Tool for CUDA Applications. PDCAT 2009: 408-413 - [c21]Takashi Soga, Akihiro Musa, Youichi Shimomura, Ryusuke Egawa, Ken'ichi Itakura, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi:
Performance evaluation of NEC SX-9 using real science and engineering applications. SC 2009 - 2008
- [c20]Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Performance Study of Secure Data Mining on the Cell Processor. CCGRID 2008: 633-638 - [c19]Hiroyuki Takizawa, Katsuto Sato, Hiroaki Kobayashi:
SPRAT: Runtime processor selection for energy-aware computing. CLUSTER 2008: 386-393 - [c18]Yoshitomo Murata, Tsutomu Inaba, Hiroyuki Takizawa, Hiroaki Kobayashi:
Implementation and evaluation of a distributed and cooperative load-balancing mechanism for dependable volunteer computing. DSN 2008: 316-325 - [c17]Chainan Satayapiwat, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Utility-Based Double Auction Mechanism for Efficient Grid Resource Allocation. ISPA 2008: 252-260 - [c16]Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi:
Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. ISPA 2008: 335-342 - [c15]Ling Xu, Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Reliability Model for Result Checking in Volunteer Computing. SAINT 2008: 201-204 - [c14]Tsutomu Inaba, Yoshitomo Murata, Hiroyuki Takizawa, Hiroaki Kobayashi:
Consideration of Resource Access History for Optimizing Overlay Networks in P2P-Based Resource Discovery. SAINT 2008: 269-272 - 2007
- [j5]Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi:
A dependable Peer-to-Peer computing platform. Future Generation Comp. Syst. 23(8): 939-955 (2007) - [j4]Hiroyuki Takizawa, Hiroaki Kobayashi:
Partial distortion entropy maximization for online data clustering. Neural Networks 20(7): 819-831 (2007) - 2006
- [j3]Hiroyuki Takizawa, Hiroaki Kobayashi:
Hierarchical parallel processing of large scale data clustering on a PC cluster with GPU co-processing. The Journal of Supercomputing 36(3): 219-234 (2006) - [c13]Hiroyuki Takizawa, Noboru Yamada, Seigo Sakai, Hiroaki Kobayashi:
Radiative Heat Transfer Simulation Using Programmable Graphics Hardware. ACIS-ICIS 2006: 29-37 - [c12]Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi:
Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications. ISPA 2006: 845-858 - [c11]Tsutomu Inaba, Takuro Okawa, Yoshitomo Murata, Hiroyuki Takizawa, Hiroaki Kobayashi:
Design and Implementation of an Efficient Search Mechanism Based on the Hybrid P2P Model for Ubiquitous Computing Systems. SAINT 2006: 45-53 - [c10]Yoshitomo Murata, Hiroyuki Takizawa, Tsutomu Inaba, Hiroaki Kobayashi:
A distributed and cooperative load balancing mechanism for large-scale P2P systems. SAINT Workshops 2006: 126-129 - 2005
- [j2]Hiroaki Kobayashi, Isao Kotera, Hiroyuki Takizawa:
Locality analysis to control dynamically way-adaptable caches. SIGARCH Computer Architecture News 33(3): 25-32 (2005) - [c9]Kosuke Ikeda, Hiroyuki Takizawa, Hiroaki Kobayashi:
An Incremental Photon-Mapping Algorithm for Fast Walk-Through Animations. Computer Graphics and Imaging 2005: 1-7 - [c8]Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi:
A Workflow Management Mechanism for Peer-to-Peer Computing Platforms. ISPA 2005: 827-832 - [c7]Hiroaki Kobayashi, Hiroyuki Takizawa, Tsutomu Inaba, Yasuaki Takizawa:
A Self-Organizing Overlay Network to Exploit the Locality of Interests for Effective Resource Discovery in P2P Systems. SAINT 2005: 246-255 - 2004
- [j1]Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Hiroaki Kobayashi, Tadao Nakamura:
Efficient parallel processing of competitive learning algorithms. Parallel Computing 30(12): 1361-1383 (2004) - [c6]Hiroyuki Takizawa, Hiroaki Kobayashi:
Multi-grain Parallel Processing of Data-Clustering on Programmable Graphics Hardware. ISPA 2004: 16-27 - [c5]Hiroyuki Takizawa, Hiroaki Kobayashi:
A Fast Computation Scheme of Partial Distortion Entropy Updating. ITCC (1) 2004: 736-741 - 2003
- [c4]Hiroyuki Takizawa, Taira Nakajima, Kentaro Sano, Hiroaki Kobayashi:
A Comparison Study of Vector Quantization Codebook Design Algorithms based on the Equidistortion Principle. Applied Informatics 2003: 255-261 - [c3]Hiroyuki Takizawa:
A Decision Criterion to Relocate Codewords for Adaptive Vector Quantization. Applied Informatics 2003: 262-268 - 2002
- [c2]Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Taira Nakajima, C. D. Lima, Hiroaki Kobayashi, Tadao Nakamura:
Parallel Algorithm for the Law-of-the-Jungle Learning to the Fast Design of Optimal Codebooks. IASTED PDCS 2002: 578-582
1990 – 1999
- 1999
- [c1]Taira Nakajima, Hiroyuki Takizawa, Hiroaki Kobayashi, Tadao Nakamura:
A self-organizing network system forming memory from nonstationary probability distributions. IJCNN 1999: 742-745
Coauthor Index
[j24] [j23] [j22] [j21] [j20] [c67] [c66] [j19] [c60] [c59] [c58] [c56] [c55] [j17] [j16] [j15] [j14] [c54] [c53] [c52] [c50] [j13] [c49] [c48] [c47] [c46] [c45] [c44] [c43] [j11] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [j10] [j9] [j8] [c33] [c31] [c30] [c29] [c28] [c27] [c26] [c25] [c24] [p1] [j7] [j6] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [j5] [j4] [j3] [c13] [c12] [c11] [c10] [j2] [c9] [c8] [c7] [j1] [c6] [c5] [c4] [c2] [c1]
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