Thomas Canhao Xu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Ville Leppänen

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Publications

2017
[j6]
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  - journals/concurrency/XuL17
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Thomas Canhao Xu, Ville Leppänen:
PEN: a power law-enhanced network design for high efficiency multicore architecture. Concurr. Comput. Pract. Exp. 29(16) (2017)
2016
[c30]
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  - conf/euromicro/XuPL16
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Thomas Canhao Xu, Jonne Pohjankukka, Ville Leppänen:
Analysing and Modelling the On-Chip Traffic of Parallel Applications. SEAA 2016: 275-282
[c29]
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  - conf/idcs/XuL16
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Thomas Canhao Xu, Ville Leppänen:
LUTMap: A Dynamic Heuristic Application Mapping Algorithm Based on Lookup Tables. IDCS 2016: 134-146
2015
[j5]
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  - journals/concurrency/XuLLPT15
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Thomas Canhao Xu, Ville Leppänen, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen:
PDNOC: Partially diagonal network-on-chip for high efficiency multicore systems. Concurr. Comput. Pract. Exp. 27(4): 1054-1067 (2015)
[c28]
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  - conf/arcs/XuL15
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Thomas Canhao Xu, Ville Leppänen:
Cache- and Communication-aware Application Mapping for Shared-cache Multicore Processors. ARCS 2015: 55-67
[c27]
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  - conf/hpcc/XuLLPT15
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Thomas Canhao Xu, Ville Leppänen, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen:
Trio: A Triple Class On-chip Network Design for Efficient Multicore Processors. HPCC/CSS/ICESS 2015: 951-956
[c26]
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  - conf/ica3pp/XuL15
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Thomas Canhao Xu, Ville Leppänen:
DBFS: Dual Best-First Search Mapping Algorithm for Shared-Cache Multicore Processors. ICA3PP (1) 2015: 185-198
[c25]
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  - conf/icsoft/XuPNLP15
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Thomas Canhao Xu, Jonne Pohjankukka, Paavo Nevalainen, Ville Leppänen, Tapio Pahikkala:
Parallel Applications and On-chip Traffic Distributions: Observation, Implication and Modelling. ICSOFT-EA 2015: 443-449
2014
[c24]
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  - conf/IEEEcit/XuLF14
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Thomas Canhao Xu, Ville Leppänen, Martti Forsell:
Exploration of a Heterogeneous Concentrated-Sparse On-Chip Interconnect for Energy Efficient Multicore Architecture. CIT 2014: 204-211
[c22]
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  - conf/uic/XuTPL14
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Thomas Canhao Xu, Jussi Toivonen, Tapio Pahikkala, Ville Leppänen:
BDMap: A Heuristic Application Mapping Algorithm for the Big Data Era. UIC/ATC/ScalCom 2014: 821-828
2013
[c19]
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  - conf/dasc/XuLF13
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Thomas Canhao Xu, Ville Leppänen, Martti Forsell:
DSNOC: A Hybrid Dense-Sparse Network-on-Chip Architecture for Efficient Scalable Computing. DASC 2013: 528-535
[c16]
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  - conf/ppam/XuLLPT13
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Thomas Canhao Xu, Ville Leppänen, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen:
PDNOC: An Efficient Partially Diagonal Network-on-Chip Design. PPAM (1) 2013: 513-522

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