Stevo Bailey

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Daniel Palmer Dabbelt

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Publications

2020
[j5]
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John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic:
A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28(12): 2721-2725 (2020)
2017
[j3]
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  - journals/jssc/KellerCZKPLBBCD17
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Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic:
A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. IEEE J. Solid State Circuits 52(7): 1863-1875 (2017)
[c4]
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  - conf/asscc/WangRDMBHCDAN17
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Angie Wang, Brian C. Richards, Daniel Palmer Dabbelt, Howard Mao, Stevo Bailey, Jaeduk Han, Eric Chang, James Dunn, Elad Alon, Borivoje Nikolic:
A 0.37mm² LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2ⁿ3^m5^k FFT accelerator integrated with a RISC-V core in 16nm FinFET. A-SSCC 2017: 305-308
2016
[c3]
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  - conf/esscirc/KellerCZLBKPBCD16
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Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic:
Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. ESSCIRC 2016: 269-272

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