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A. Richard Newton
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Publications
- 1993
- [j27]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Sequential test generation and synthesis for testability at the register-transfer and logic levels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(5): 579-598 (1993) - 1992
- [j25]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Heuristic minimization of Boolean relations using testing techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(9): 1166-1172 (1992) - 1991
- [j24]Srinivas Devadas, A. Richard Newton:
Exact algorithms for output encoding, state assignment, and four-level Boolean minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1): 13-27 (1991) - [j22]Pranav Ashar, Srinivas Devadas, A. Richard Newton:
Optimum and heuristic algorithms for an approach to finite state machine decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(3): 296-310 (1991) - [j21]Pranav Ashar, Srinivas Devadas, A. Richard Newton:
Irredundant interacting sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(3): 311-325 (1991) - [j18]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Test generation and verification for highly sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5): 652-667 (1991) - 1990
- [j17]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton:
Redundancies and don't cares in sequential logic synthesis. J. Electron. Test. 1(1): 15-30 (1990) - [j16]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
Irredundant sequential machines via optimal logic synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(1): 8-18 (1990) - [c37]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Verification of Interacting Sequential Circuits. DAC 1990: 213-219 - [c34]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Sequential Test Generation at the Register-Transfer and Logic Levels. DAC 1990: 580-586 - [c33]Pranav Ashar, Srinivas Devadas, A. Richard Newton:
A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. DAC 1990: 601-606 - [c31]Pranav Ashar, Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test. ICCAD 1990: 84-87 - [c29]Pranav Ashar, Srinivas Devadas, A. Richard Newton:
Testability driven synthesis of interacting finite state machines. ICCD 1990: 273-276 - [c28]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Heuristic minimization of Boolean relations using testing techniques. ICCD 1990: 277-281 - [c26]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Sequential logic synthesis for testability using register-transfer level descriptions. ITC 1990: 274-283 - 1989
- [j13]Srinivas Devadas, A. Richard Newton:
Algorithms for hardware allocation in data path synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(7): 768-781 (1989) - [j12]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
A synthesis and optimization procedure for fully and easily testable sequential machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(10): 1100-1107 (1989) - [j11]Srinivas Devadas, A. Richard Newton:
Decomposition and factorization of sequential finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(11): 1206-1217 (1989) - [c24]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton:
Easily testable PLA-based finite state machines. FTCS 1989: 102-109 - [c23]Pranav Ashar, Srinivas Devadas, A. Richard Newton:
Optimum and heuristic algorithms for finite state machine decomposition and partitioning. ICCAD 1989: 216-219 - [c21]Abhijit Ghosh, Srinivas Devadas, A. Richard Newton:
Test generation for highly sequential circuits. ICCAD 1989: 362-365 - [c19]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton:
Redundancies and Don't Cares in Sequential Logic Synthesis. ITC 1989: 491-500 - 1988
- [j9]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton:
On the verification of sequential machines at differing levels of abstraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(6): 713-722 (1988) - [j8]Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
Test generation for sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(10): 1081-1093 (1988) - [j7]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(12): 1290-1300 (1988) - [c16]Srinivas Devadas, A. Richard Newton:
Decomposition and factorization of sequential finite state machines. ICCAD 1988: 148-151 - [c15]Srinivas Devadas, Albert R. Wang, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
Boolean decomposition in multi-level logic optimization. ICCAD 1988: 290-293 - [c13]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli:
Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. ITC 1988: 621-630 - [c12]Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli:
An Incomplete Scan Design Approach to Test Generation for Sequential Machines. ITC 1988: 730-734 - 1987
- [j6]Srinivas Devadas, A. Richard Newton:
Topological Optimization of Multiple-Level Array Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(6): 915-941 (1987) - [c11]Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton:
On the Verification of Sequential Machines at Differing Levels of Abstraction. DAC 1987: 271-276 - 1986
- [c7]Srinivas Devadas, A. Richard Newton:
GENIE: a generalized array optimizer for VLSI synthesis. DAC 1986: 631-637
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