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Shuichi Sakai
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Publications
- 2023
- [j24]Shun Nagasaki, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System. IEEE Des. Test 40(6): 18-29 (2023) - [j23]Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
A Principal Factor of Performance in Decoupled Front-End. IEICE Trans. Inf. Syst. 106(12): 1960-1968 (2023) - [j22]Rin Oishi, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
FPGA-based Garbling Accelerator with Parallel Pipeline Processing. IEICE Trans. Inf. Syst. 106(12): 1988-1996 (2023) - [c83]Shu Sugita, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai:
A Sound and Complete Algorithm for Code Generation in Distance-Based ISA. CC 2023: 73-84 - [c82]Reoma Matsuo, Toru Koizumi, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya:
TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA. DATE 2023: 1-2 - [c81]Taichi Amano, Junichiro Kadomoto, Satoshi Mitsuno, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai:
An Out-of-Order Superscalar Processor Using STRAIGHT Architecture in 28 nm CMOS. ISCAS 2023: 1-5 - [c80]Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors. MICRO 2023: 1-16 - [c79]Yusuke Izawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
A Functional Reactive Programming Language for Wirelessly Connected Shape-Changeable Chiplet-Based Computers. SPLASH Companion 2023: 61-62 - [c78]Takashi Murayama, Shu Sugita, Hiroyuki Saegusa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
iKnowde: Interactive Learning Path Generation System Based on Knowledge Dependency Graphs. UIST (Adjunct Volume) 2023: 25:1-25:3 - 2022
- [c77]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Deformable Chiplet-Based Computer Using Inductively Coupled Wireless Communication. ASP-DAC 2022: 98-99 - [c76]Toru Koizumi, Tomoki Nakamura, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya:
T-SKID: Predicting When to Prefetch Separately from Address Prediction. DATE 2022: 1389-1394 - [c75]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Evaluation of Different Microarchitectures for Energy-Efficient RISC-V Cores. MCSoC 2022: 78-84 - 2021
- [j21]Junichiro Kadomoto, Takuya Sasatani, Koya Narumi, Naoto Usami, Hidetsugu Irie, Shuichi Sakai, Yoshihiro Kawahara:
Toward Wirelessly Cooperated Shape-Changing Computing Particles. IEEE Pervasive Comput. 20(3): 9-17 (2021) - [c74]Tomoki Nakamura, Kazutaka Tomida, Shouta Kouno, Hidetsugu Irie, Shuichi Sakai:
Stochastic Iterative Approximation: Software/hardware techniques for adjusting aggressiveness of approximation. ICCD 2021: 74-82 - [c73]Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Accurate and Fast Performance Modeling of Processors with Decoupled Front-end. ICCD 2021: 88-92 - [c72]Toru Koizumi, Shu Sugita, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Compiling and Optimizing Real-world Programs for STRAIGHT ISA. ICCD 2021: 400-408 - [c71]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Multiport Register File Design for High-Performance Embedded Cores. MCSoC 2021: 281-286 - 2020
- [c70]Junichiro Kadomoto, Satoshi Mitsuno, Hidetsugu Irie, Shuichi Sakai:
An Inductively Coupled Wireless Bus for Chiplet-Based Systems. ASP-DAC 2020: 9-10 - [c69]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
A Self-Sensing Technique Using Inductively-Coupled Coils for Deformable User Interfaces. AsianCHI@CHI 2020: 7 - [c68]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
A RISC-V Processor with an Inter-Chiplet Wireless Communication Interface for Shape-Changeable Computers. COOL CHIPS 2020: 1-3 - [c67]Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai:
A High-Performance Out-of-Order Soft Processor Without Register Renaming. FPL 2020: 73-78 - [c66]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
Design of Shape-Changeable Chiplet-Based Computers Using an Inductively Coupled Wireless Bus Interface. ICCD 2020: 589-596 - 2019
- [c65]Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai:
WiXI: An Inter-Chip Wireless Bus Interface for Shape-Changeable Chiplet-Based Computers. ICCD 2019: 100-108 - 2018
- [c64]Junichiro Kadomoto, Toru Koizumi, Akifumi Fukuda, Reoma Matsuo, Susumu Mashimo, Akifumi Fujita, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai:
An Area-Efficient Out-of-Order Soft-Core Processor Without Register Renaming. FPT 2018: 374-377 - [c63]Toru Koizumi, Satoshi Nakae, Akifumi Fukuda, Hidetsugu Irie, Shuichi Sakai:
Reduction of Instruction Increase Overhead by STRAIGHT Compiler. CANDAR Workshops 2018: 92-98 - [c62]Takahiro Yamada, Hidetsugu Irie, Masahiro Kunitake, Eiji Nagano, Shuichi Sakai:
Estimating driver's readiness by understanding driving posture. ICCE 2018: 1-4 - [c61]Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai:
STRAIGHT: Hazardless Processor Architecture Without Register Renaming. MICRO 2018: 121-133 - 2017
- [c60]Mizuki Miyanaga, Hidetsugu Irie, Shuichi Sakai:
Accelerating Integrity Verification on Secure Processors by Promissory Hash. PRDC 2017: 20-29 - 2016
- [c59]Hayato Nomura, Hiroyuki Katchi, Hidetsugu Irie, Shuichi Sakai:
"Stubborn" strategy to mitigate remaining cache misses. ICCD 2016: 388-391 - [c58]Takahiro Yamada, Hidetsugu Irie, Shuichi Sakai:
High-Accuracy Joint Position Estimation and Posture Detection System for Driving. MobiQuitous (Adjunct Proceedings) 2016: 219-224 - 2008
- [j13]Shuichi Sakai, Masahiro Goshima, Hidetsugu Irie:
Ultra Dependable Processor. IEICE Trans. Electron. 91-C(9): 1386-1393 (2008) - 2007
- [j11]Hidetsugu Irie, Ken Sugimoto, Masahiro Goshima, Shuichi Sakai:
Preventing timing errors on register writes: mechanisms of detections and recoveries. SIGARCH Comput. Archit. News 35(5): 25-31 (2007) - [c51]Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai:
Utilization of SECDED for soft error and variation-induced defect tolerance in caches. DATE 2007: 1134-1139 - 2006
- [c49]Satoshi Katsunuma, Hiroyuki Kurita, Ryota Shioya, Kazuto Shimizu, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai:
Base Address Recognition with Data Flow Tracking for Injection Attack Detection. PRDC 2006: 165-172
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last updated on 2024-01-04 20:21 CET by the dblp team
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