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ORCIDBertrand Le Gal
- > Home > Persons > Bertrand Le Gal
Publications
- 2012
[j6]Emmanuel Casseau, Bertrand Le Gal:
Design of multi-mode application-specific cores based on high-level synthesis. Integr. 45(1): 9-21 (2012)- 2011
- [j4]Bertrand Le Gal, Emmanuel Casseau:
Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design. EURASIP J. Adv. Signal Process. 2011 (2011) - [j3]Bertrand Le Gal, Emmanuel Casseau:
Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis. J. Signal Process. Syst. 62(3): 341-357 (2011) - 2009
- [c15]Bertrand Le Gal, Emmanuel Casseau:
Automated multimode system design for high performance DSP applications. EUSIPCO 2009: 1289-1293 - [c14]Emmanuel Casseau, Bertrand Le Gal:
High-level synthesis for the design of FPGA-based signal processing systems. ICSAMOS 2009: 25-32 - 2008
- [j2]Bertrand Le Gal, Emmanuel Casseau, Caaliph Andriamisaina:
Synthèse de haut niveau tenant compte de la dynamique des traitements. Analyse de la largeur des données d'applications du TDSI et gestion de cette information lors de la synthèse de haut niveau. Tech. Sci. Informatiques 27(9-10): 1129-1154 (2008) - [j1]Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet:
Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 16(11): 1454-1464 (2008) - 2007
- [c9]Bertrand Le Gal, Lilian Bossuet, Shafqat Khan, Emmanuel Casseau:
HLS design flow for the synthesis of multimode systems under multiple constraints. ICECS 2007: 314-317 - 2006
- [c8]Bertrand Le Gal, Emmanuel Casseau:
IP Generation Targeting Multiple Bit-Width Standards. ICECS 2006: 784-787 - [c7]Caaliph Andriamisaina, Bertrand Le Gal, Emmanuel Casseau:
Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems. SiPS 2006: 280-285 - [c6]Bertrand Le Gal, Caaliph Andriamisaina, Emmanuel Casseau:
Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems. SoCC 2006: 175-178 - 2005
- [c5]Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno:
Hardware Virtual Components Compliant with Communication System Standards. DSD 2005: 88-95 - [c4]Emmanuel Casseau, Bertrand Le Gal, Pierre Bomel, Christophe Jégo, Sylvain Huet, Eric Martin:
C-based rapid prototyping for digital signal processing. EUSIPCO 2005: 1-4 - [c3]Bertrand Le Gal, Emmanuel Casseau, Eric Martin:
Pipelined memory controllers for DSP real-time applications handling unpredictable data accesses. EUSIPCO 2005: 1-4 - [c2]Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, Eric Martin:
Pipelined Memory Controllers for DSP Applications Handling Unpredictable Data Accesses. ISVLSI 2005: 268-269 - 2004
- [c1]Emmanuel Casseau, Bertrand Le Gal, Christophe Jégo, Nathalie Le Heno, Eric Martin:
Reed-Solomon behavioral virtual component for communication systems. ISCAS (4) 2004: 173-176
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