Bharadwaj S. Amrutur

◀ ▶ joint publications with Vikram Chaturvedi

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Publications

2013
[j18]
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Vikram Chaturvedi, Tejasvi Anand, Bharadwaj Amrutur:
An 8-to-1 bit 1-MS/s SAR ADC With VGA and Integrated Data Compression for Neural Recording. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 2034-2044 (2013)
2012
[c35]
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  - conf/icecsys/GhosalACA12
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Kaushik Ghosal, Tejasvi Anand, Vikram Chaturvedi, Bharadwaj Amrutur:
A power-scalable RF CMOS receiver for 2.4 GHz Wireless Sensor Network applications. ICECS 2012: 161-164
2011
[j14]
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  - journals/esticas/ChaturvediA11
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Vikram Chaturvedi, Bharadwaj Amrutur:
An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(4): 536-545 (2011)
[c25]
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  - conf/vlsid/ChaturvediA11
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Vikram Chaturvedi, Bharadwaj Amrutur:
A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology. VLSI Design 2011: 328-333

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