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Wolfgang Ecker

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Nicolas Gerlin

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Publications

2023
[c119]
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  - conf/ddecs/GerlinKVLBCUGTPJKE23
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  persistent URL:
  - https://dblp.org/rec/conf/ddecs/GerlinKVLBCUGTPJKE23
Nicolas Gerlin, Endri Kaja, Fabian Vargas, Li Lu, Anselm Breitenreiter, Junchao Chen, Markus Ulbricht, Maribel Gomez, Ares Tahiraga, Sebastian Prebeck, Eyck Jentzsch, Milos Krstic, Wolfgang Ecker:
Bits, Flips and RISCs. DDECS 2023: 140-149
[c116]
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  - conf/mcsoc/KajaGKDE23
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  - https://dblp.org/rec/conf/mcsoc/KajaGKDE23
Endri Kaja, Nicolas Gerlin, Robert Kunzelmann, Keerthikumara Devarajegowda, Wolfgang Ecker:
Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation. MCSoC 2023: 508-515
2022
[c111]
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  - conf/dft/KajaGBDSKE22
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  - https://dblp.org/rec/conf/dft/KajaGBDSKE22
Endri Kaja, Nicolas Gerlin, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker:
MetaFS: Model-driven Fault Simulation Framework. DFT 2022: 1-4
[c105]
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  - conf/vlsi/GerlinKBDSKE22
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Nicolas Gerlin, Endri Kaja, Monideep Bora, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker:
Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection. VLSI-SoC 2022: 1-6
[c104]
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  - conf/vlsi/KajaGBRDSKE22
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Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker:
Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation. VLSI-SoC 2022: 1-6
[i2]
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  - journals/corr/abs-2204-13183
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Endri Kaja, Nicolas Gerlin, Luis Rivas, Monideep Bora, Keerthikumara Devarajegowda, Wolfgang Ecker:
MetFI: Model-driven Fault Simulation Framework. CoRR abs/2204.13183 (2022)
2021
[c101]
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  - conf/dft/KajaGVRPHDE21
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Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker:
Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models. DFT 2021: 1-6

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