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Jun Yang 0006
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Publications
- 2023
- [j76]Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Renyuan Zhang, Yu Gong, Zhen Wang, Wei Ge, Jun Yang:
Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition. IEEE Des. Test 40(3): 26-35 (2023) - 2022
- [j64]Bo Liu, Ziyu Wang, Xuetao Wang, Renyuan Zhang, Anfeng Xue, Qiao Shen, Na Xie, Yu Gong, Zhen Wang, Jun Yang, Hao Cai:
An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4217-4228 (2022) - [j62]Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Ziyu Wang, Yu Gong, Weiqiang Liu, Jinjiang Yang, Zhen Wang, Jun Yang:
More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1571-1582 (2022) - 2021
- [j58]Jingjing Guo, Peng Cao, Mengxiao Li, Yu Gong, Zhiyuan Liu, Geng Bai, Jun Yang:
Semi-Analytical Path Delay Variation Model With Adjacent Gates Decorrelation for Subthreshold Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 931-944 (2021) - 2020
- [j48]Bo Liu, Hao Cai, Zhen Wang, Yuhao Sun, Zeyu Shen, Wentao Zhu, Yan Li, Yu Gong, Wei Ge, Jun Yang, Longxing Shi:
A 22nm, 10.8 μ W/15.1 μ W Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor. IEEE Trans. Circuits Syst. 67-I(12): 4733-4746 (2020) - 2019
- [j43]Bo Liu, Zhen Wang, Shisheng Guo, Huazhen Yu, Yu Gong, Jun Yang, Longxing Shi:
An energy-efficient voice activity detector using deep neural networks and approximate computing. Microelectron. J. 87: 12-21 (2019) - 2018
- [j34]Zhen Wang, Mengwen Xia, Bo Liu, Xing Ruan, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang:
EERA-DNN: An energy-efficient reconfigurable architecture for DNNs with hybrid bit-width and logarithmic multiplier. IEICE Electron. Express 15(8): 20180212 (2018) - [c15]Bo Liu, Shisheng Guo, Hai Qin, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang:
An Energy-efficient Reconfigurable Hybrid DNN Architecture for Speech Recognition with Approximate Computing. DSP 2018: 1-5 - 2017
- [c8]Yu Gong, Tingting Xu, Bo Liu, Wei Ge, Jinjiang Yang, Jun Yang, Longxing Shi:
Processing LSTM in memory using hybrid network expansion model. SiPS 2017: 1-6 - [c7]Bo Liu, Xing Ruan, Mengwen Xia, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang:
An energy-efficient accelerator for hybrid bit-width DNNs. SSCI 2017: 1-8
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