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Hong-June Park

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Byungsub Kim

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Publications

2021
[j80]
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Sooeun Lee, Jaeyoung Seo, Changyoon Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A DFE-Enhanced Phase-Difference Modulation Signaling for Multi-Drop Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1862-1866 (2021)
2020
[j78]
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Ji-Hoon Lee, Jaehyun Ko, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Body Channel Communication Technique Utilizing Decision Feedback Equalization. IEEE Access 8: 198468-198481 (2020)
[j77]
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Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A pattern-dependent injection-locked CDR for clock-embedded signaling. Microelectron. J. 96: 104708 (2020)
[j76]
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Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jahyun Koo, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 2114-2127 (2020)
[j75]
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  - journals/tcas/ChoKSP20
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Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone. IEEE Trans. Circuits Syst. 67-II(11): 2392-2396 (2020)
[j74]
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Cheolmin Ahn, Jaehyeong Hong, Jongshin Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss. IEEE Trans. Circuits Syst. 67-II(12): 2863-2867 (2020)
[j73]
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  - journals/tvlsi/SeoKLLSPK20
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Jaeyoung Seo, Jaehyun Ko, Kyunghyun Lim, Sooeun Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 818-822 (2020)
[c43]
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Seungho Han, Sungyu Jeong, Chanho Kim, Hong-June Park, Byungsub Kim:
GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design. DAC 2020: 1-6
2019
[j70]
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Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192-pW Voltage Reference Generating Bandgap- $V_{\text{th}}$ With Process and Temperature Dependence Compensation. IEEE J. Solid State Circuits 54(12): 3281-3291 (2019)
[j69]
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Hyunwoo Son, Hwasuk Cho, Jungho Lee, Seongun Bae, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation. IEEE Trans. Biomed. Circuits Syst. 13(5): 986-998 (2019)
[j68]
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Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 3077-3088 (2019)
[c42]
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Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect. ISSCC 2019: 308-310
[c41]
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Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyoung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna. VLSI Circuits 2019: 294-
2018
[j67]
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Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. IEEE J. Solid State Circuits 53(1): 144-154 (2018)
[j66]
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Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications. IEEE J. Solid State Circuits 53(2): 404-417 (2018)
[j65]
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Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching. IEEE J. Solid State Circuits 53(6): 1780-1792 (2018)
[j64]
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Hwasuk Cho, Hyunwoo Son, Kihwan Seong, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table. IEEE Trans. Biomed. Circuits Syst. 12(1): 161-170 (2018)
[j63]
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Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2310-2321 (2018)
[j62]
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Kwangmin Kim, Seokjoon Kang, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2591-2598 (2018)
[c40]
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Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic. ASP-DAC 2018: 309-310
[c39]
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Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 16.6-pJ/b 150-Mb/s body-channel communication transceiver with decision feedback equalization improving >200x area efficiency. ASP-DAC 2018: 311-312
[c38]
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Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A low-power wide dynamic-range current readout circuit for biosensors. ASP-DAC 2018: 325-326
[c37]
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Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. ISSCC 2018: 122-124
[c36]
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Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces. ISSCC 2018: 272-274
2017
[j61]
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Yoon-Jee Kim, Sung-Eun Cho, Ji-Yong Um, Min-Kyun Chae, Jihoon Bang, Jongkeun Song, Taeho Jeon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation. IEEE Trans. Biomed. Circuits Syst. 11(1): 87-97 (2017)
[j60]
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Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors. IEEE Trans. Biomed. Circuits Syst. 11(3): 523-533 (2017)
[j59]
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Seunghwan Hong, Shinwoong Kim, Seungnam Choi, Hwasuk Cho, Jaehyeong Hong, Young Hun Seo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 250-µW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 106-110 (2017)
[j58]
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Young-Ho Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 249-253 (2017)
[j57]
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Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1706-1717 (2017)
[j56]
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Jaeyoung Seo, Minsoo Choi, Sanquan Song, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1067-1071 (2017)
[j55]
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  - journals/tvlsi/SeongLKSP17
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Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 788-792 (2017)
[j54]
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Yelim Youn, Kwangmin Kim, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2402-2410 (2017)
[c35]
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Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 10-GHz multi-purpose reconfigurable built-in self-test circuit for high-speed links. A-SSCC 2017: 73-76
[c34]
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Jahyun Koo, Kyoung-Sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop. ISSCC 2017: 94-95
[c33]
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Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit. ISSCC 2017: 100-101
[c32]
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Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
8.7 A 0.0047mm² highly synthesizable TDC- and DCO-less fractional-N PLL with a seamless lock range of fREF to 1GHz. ISSCC 2017: 154-155
[c31]
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Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS. ISSCC 2017: 400-401
2016
[j52]
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Shinwoong Kim, Seunghwan Hong, Kapseok Chang, Hyungsik Ju, Jaewook Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 51(2): 391-400 (2016)
[j51]
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Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 51(8): 1890-1901 (2016)
[j50]
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Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement. IEEE J. Solid State Circuits 51(8): 1902-1914 (2016)
[j49]
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Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(1): 122-133 (2016)
[j48]
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Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs. IEEE Trans. Circuits Syst. II Express Briefs 63-II(2): 141-145 (2016)
[j47]
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  - journals/tcas/ChoiSSLKPS16
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Seungnam Choi, Hyunwoo Son, Jongshin Shin, Sang-Hyun Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(2): 276-287 (2016)
[c30]
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Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-power LDO circuit with a fast load regulation. APCCAS 2016: 47-49
[c29]
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Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable 6Gbps voltage-mode transmitter for serial link. A-SSCC 2016: 245-248
[c28]
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Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface. ISOCC 2016: 63-64
[c27]
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Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme. VLSI Circuits 2016: 1-2
2015
[j46]
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Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer. IEEE Trans. Biomed. Circuits Syst. 9(1): 138-151 (2015)
[j45]
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Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1335-1344 (2015)
[c26]
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Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim:
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design. ICCAD 2015: 567-574
[c25]
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Jongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.7 A 29nW bandgap reference circuit. ISSCC 2015: 1-3
2014
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Seung-Hun Lee, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
Current-Mode Transceiver for Silicon Interposer Channel. IEEE J. Solid State Circuits 49(9): 2044-2053 (2014)
[j43]
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Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 49(11): 2618-2630 (2014)
[j42]
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Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seung-Hun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array. IEEE Trans. Biomed. Circuits Syst. 8(6): 799-809 (2014)
[j41]
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Hye-Jung Kwon, Jae-Seung Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 481-485 (2014)
[j40]
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Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 3034-3043 (2014)
[j39]
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Hyunsoo Ha, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.5-V, 1.47- µW 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation. IEEE Trans. Circuits Syst. II Express Briefs 61-II(11): 840-844 (2014)
[j38]
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Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination. IEEE Trans. Circuits Syst. II Express Briefs 61-II(12): 987-991 (2014)
[c24]
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Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A voltage-scalable 10-b pipelined ADC with current-mode amplifier. CICC 2014: 1-4
[c23]
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Jae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong-June Park:
A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period. ISCAS 2014: 682-685
[c22]
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Dong Hoon Baek, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface. ISSCC 2014: 48-49
[c21]
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Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology. ISSCC 2014: 50-51
[c20]
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Ji-Yong Um, Eun-Woo Song, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seunghun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area. ISSCC 2014: 426-427
2013
[j36]
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Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation. IEEE J. Solid State Circuits 48(9): 2118-2127 (2013)
[j35]
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Dong-Woo Jee, Yunjae Suh, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL. IEEE J. Solid State Circuits 48(11): 2795-2804 (2013)
[j34]
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Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface. IEEE Trans. Circuits Syst. II Express Briefs 60-II(2): 91-95 (2013)
[j33]
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Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 60-II(3): 142-146 (2013)
2012
[j28]
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Dong-Woo Jee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 721-725 (2012)

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