Sai Rahul Chalamalasetti

◀ ▶ joint publications with Sohan Purohit

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Publications

2013
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede:
Throughput/Resource-Efficient Reconfigurable Processor for Multimedia Applications. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1346-1350 (2013)
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede:
Design and Evaluation of High-Performance Processing Elements for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1915-1927 (2013)
2011
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  - conf/ieeehpcs/VanderbauwhedeCPM11
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Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala:
A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks. HPCS 2011: 461-467
2010
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  - journals/esl/ChalamalasettiPMV10
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Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede:
Radiation-Hardened Reconfigurable Array With Instruction Roll-Back. IEEE Embed. Syst. Lett. 2(4): 123-126 (2010)
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  - conf/ahs/PurohitCM10
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala:
Low overhead soft error detection and correction scheme for reconfigurable pipelined data paths. AHS 2010: 59-65
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  - conf/asap/VanderbauwhedeMCP10
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Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit:
A C++-embedded Domain-Specific Language for programming the MORA soft processor array. ASAP 2010: 141-148
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala:
Design of self correcting radiation hardened digital circuits using decoupled ground bus. ACM Great Lakes Symposium on VLSI 2010: 405-408
2009
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  - conf/ahs/ChalamalasettiPMV09
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Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede:
MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor. AHS 2009: 389-396
[c5]
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Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit:
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. ERSA 2009: 195-201
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  - conf/fpl/ChalamalasettiVPM09
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Sai Rahul Chalamalasetti, Wim Vanderbauwhede, Sohan Purohit, Martin Margala:
A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model. FPL 2009: 534-538
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala:
A 1.2v, 1.02 ghz 8 bit SIMD compatible highly parallel arithmetic data path for multi-precision arithmetic. ACM Great Lakes Symposium on VLSI 2009: 433-436
2008
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  - conf/reconfig/PurohitCMC08
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Pasquale Corsonello:
Power-Efficient High Throughput Reconfigurable Datapath Design for Portable Multimedia Devices. ReConFig 2008: 217-222
[c1]
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  - conf/socc/PurohitCMC08
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Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Pasquale Corsonello:
Power/throughput/area efficient PIM-based reconfigurable array for parallel processing. SoCC 2008: 375-378

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