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Atanas Rountev
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Publications
- 2022
- [c94]Yufan Xu, Saurabh Raje, Atanas Rountev, Gerald Sabin, Aravind Sukumaran-Rajam, P. Sadayappan:
Training of deep learning pipelines on memory-constrained GPUs via segmented fused-tiled execution. CC 2022: 104-116 - [c93]Miheer Vaidya, Aravind Sukumaran-Rajam, Atanas Rountev, P. Sadayappan:
Comprehensive Accelerator-Dataflow Co-design Optimization for Convolutional Neural Networks. CGO 2022: 325-335 - 2021
- [c92]Rui Li, Yufan Xu, Aravind Sukumaran-Rajam, Atanas Rountev, P. Sadayappan:
Analytical characterization and design space exploration for optimization of CNNs. ASPLOS 2021: 928-942 - [c89]Rui Li, Yufan Xu, Aravind Sukumaran-Rajam, Atanas Rountev, P. Sadayappan:
Efficient Distributed Algorithms for Convolutional Neural Networks. SPAA 2021: 439-442 - [i3]Rui Li, Yufan Xu, Aravind Sukumaran-Rajam, Atanas Rountev, P. Sadayappan:
Analytical Characterization and Design Space Exploration for Optimization of CNNs. CoRR abs/2101.09808 (2021) - [i2]Rui Li, Yufan Xu, Aravind Sukumaran-Rajam, Atanas Rountev, P. Sadayappan:
Efficient distributed algorithms for Convolutional Neural Networks. CoRR abs/2105.13480 (2021) - 2019
- [c85]Jinsung Kim, Aravind Sukumaran-Rajam, Vineeth Thumma, Sriram Krishnamoorthy, Ajay Panyala, Louis-Noël Pouchet, Atanas Rountev, P. Sadayappan:
A Code Generator for High-Performance Tensor Contractions on GPUs. CGO 2019: 85-95 - [c84]Prashant Singh Rawat, Miheer Vaidya, Aravind Sukumaran-Rajam, Atanas Rountev, Louis-Noël Pouchet, P. Sadayappan:
On Optimizing Complex Stencils on GPUs. IPDPS 2019: 641-652 - [c83]Rui Li, Aravind Sukumaran-Rajam, Richard Veras, Tze Meng Low, Fabrice Rastello, Atanas Rountev, P. Sadayappan:
Analytical cache modeling and tilesize optimization for tensor contractions. SC 2019: 74:1-74:13 - 2018
- [j11]Prashant Singh Rawat, Miheer Vaidya, Aravind Sukumaran-Rajam, Mahesh Ravishankar, Vinod Grover, Atanas Rountev, Louis-Noël Pouchet, P. Sadayappan:
Domain-Specific Optimization and Generation of High-Performance GPU Code for Stencil Computations. Proc. IEEE 106(11): 1902-1920 (2018) - [c79]Prashant Singh Rawat, Fabrice Rastello, Aravind Sukumaran-Rajam, Louis-Noël Pouchet, Atanas Rountev, P. Sadayappan:
Register optimizations for stencils on GPUs. PPoPP 2018: 168-182 - [c78]Prashant Singh Rawat, Aravind Sukumaran-Rajam, Atanas Rountev, Fabrice Rastello, Louis-Noël Pouchet, P. Sadayappan:
Associative instruction reordering to alleviate register pressure. SC 2018: 46:1-46:13 - 2017
- [c75]Prashant Singh Rawat, Aravind Sukumaran-Rajam, Atanas Rountev, Fabrice Rastello, Louis-Noël Pouchet, P. Sadayappan:
POSTER: Statement Reordering to Alleviate Register Pressure for Stencils on GPUs. PACT 2017: 158-159
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