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ORCIDKazuo Sakiyama
- > Home > Persons > Kazuo Sakiyama
Publications
- 2019
[j30]Takeshi Sugawara
, Natsu Shoji, Kazuo Sakiyama, Kohei Matsuda, Noriyuki Miura, Makoto Nagata:
Side-channel leakage from sensor-based countermeasures against fault injection attack. Microelectron. J. 90: 63-71 (2019)- 2018
- [j27]Kohei Matsuda, Tatsuya Fujii, Natsu Shoji, Takeshi Sugawara, Kazuo Sakiyama, Yu-ichi Hayashi, Makoto Nagata, Noriyuki Miura:
A 286 F2/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser Against Laser Fault Injection Attack on Cryptographic Processor. IEEE J. Solid State Circuits 53(11): 3174-3182 (2018) - [c66]Jean-Luc Danger, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, Kazuo Sakiyama, Noriyuki Miura, Makoto Nagata:
Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. DSD 2018: 508-515 - [c63]Kohei Matsuda, Tatsuya Fujii, Natsu Shoji, Takeshi Sugawara, Kazuo Sakiyama, Yu-ichi Hayashi, Makoto Nagata, Noriyuki Miura:
A 286F2/cell distributed bulk-current sensor and secure flush code eraser against laser fault injection attack. ISSCC 2018: 352-354 - 2017
- [j26]Makoto Nagata, Daisuke Fujimoto, Noriyuki Miura, Naofumi Homma, Yu-ichi Hayashi, Kazuo Sakiyama:
Protecting cryptographic integrated circuits with side-channel information. IEICE Electron. Express 14(2): 20162005 (2017) - [c62]Takeshi Sugawara, Natsu Shoji, Kazuo Sakiyama, Kohei Matsuda, Noriyuki Miura, Makoto Nagata:
Exploiting Bitflip Detector for Non-invasive Probing and its Application to Ineffective Fault Analysis. FDTC 2017: 49-56 - 2016
- [c59]Kohei Matsuda, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Tatsuya Fujii, Kazuo Sakiyama:
On-chip substrate-bounce monitoring for laser-fault countermeasure. AsianHOST 2016: 1-6 - 2015
- [j24]Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Jean-Luc Danger, Takafumi Aoki:
A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation. IEEE Trans. Very Large Scale Integr. Syst. 23(8): 1429-1438 (2015) - 2014
- [j23]Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger:
Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage. IEICE Trans. Electron. 97-C(4): 272-279 (2014)
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