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Feng Zhang 0014

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Ming Liu 0022

> Home > Persons > Feng Zhang 0014

Publications

2023
[c23]
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  dblp key:
  - conf/isscc/YueHWCHZSLDZYLL23
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  persistent URL:
  - https://dblp.org/rec/conf/isscc/YueHWCHZSLDZYLL23
Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu:
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. ISSCC 2023: 252-253
2021
[j10]
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  - journals/chinaf/DingGYXLLYLYZL21
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  - https://dblp.org/rec/journals/chinaf/DingGYXLLYLYZL21
Qingting Ding, Tiancheng Gong, Jie Yu, Xiaoxin Xu, Xiaoyan Li, Hangbing Lv, Jianguo Yang, Qing Luo, Peng Yuan, Feng Zhang, Ming Liu:
Investigation of weight updating modes on oxide-based resistive switching memory synapse towards neuromorphic computing applications. Sci. China Inf. Sci. 64(11) (2021)
[c22]
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  - conf/isscc/YangXXWJYDZLL21
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Jianguo Yang, Xiaoyong Xue, Xiaoxin Xu, Qiao Wang, Haijun Jiang, Jie Yu, Danian Dong, Feng Zhang, Hangbing Lv, Ming Liu:
24.2 A 14nm-FinFET 1Mb Embedded 1T1R RRAM with a 0.022µ m² Cell Size Using Self-Adaptive Delayed Termination and Multi-Cell Reference. ISSCC 2021: 336-338
2020
[c21]
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  - conf/vlsic/YangXXL0ZC020
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Jianguo Yang, Xiaoyong Xue, Xiaoxin Xu, Hangbing Lv, Feng Zhang, Xiaoyang Zeng, Meng-Fan Chang, Ming Liu:
A 28nm 1.5Mb Embedded 1T2R RRAM with 14.8 Mb/mm² using Sneaking Current Suppression and Compensation Techniques. VLSI Circuits 2020: 1-2
2019
[j6]
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  - journals/tcas/WangLSFWLLZWCL19
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Yiming Wang, Yun Li, Haihua Shen, Dongyu Fan, Wei Wang, Ling Li, Qi Liu, Feng Zhang, Xinghua Wang, Meng-Fan Chang, Ming Liu:
A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs 66-II(4): 662-666 (2019)
[i2]
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  - journals/corr/abs-1905-11207
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Qiang Huo, Zhenhua Wu, Weixing Huang, Xingsheng Wang, Geyu Tang, Jiaxin Yao, Yongpan Liu, Feng Zhang, Ling Li, Ming Liu:
A Novel General Compact Model Approach for 7nm Technology Node Circuit Optimization from Device Perspective and Beyond. CoRR abs/1905.11207 (2019)
2017
[c12]
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  - conf/asscc/QiKLMSYLBHWDMHL17
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Nan Qi, Yuhang Kang, Qipeng Lin, Jianxu Ma, Jingbo Shi, Bozhi Yin, Chang Liu, Rui Bai, Shang Hu, Juncheng Wang, Jiangbing Du, Lin Ma, Zuyuan He, Ming Liu, Feng Zhang, Patrick Yin Chiang:
A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects. A-SSCC 2017: 89-92
[c11]
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  - conf/asscc/ZhangFDLFLHDCBL17
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Feng Zhang, Dongyu Fan, Yuan Duan, Jin Li, Cong Fang, Yun Li, Xiaowei Han, Lan Dai, Cheng-Ying Chen, Jinshun Bi, Ming Liu, Meng-Fan Chang:
A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range. A-SSCC 2017: 173-176
[c10]
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  dblp key:
  - conf/cicc/HanJSWWCZXDWXPZ17
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Xiaowei Han, Qian Jia, Hongbin Sun, Longfei Wang, Huaqiang Wu, Yimao Cai, Feng Zhang, Yongyi Xie, Fangxu Dong, Xiaoguang Wang, Xiaofei Xue, Li Pang, Xiaoqing Zhao, Mengnan Wu, Pu Bai, Qi Liu, Hangbing Lv, Bing Yu, Chao Zhao, He Qian, Ru Huang, Ming Liu, Yumei Zhou, Nanning Zheng, Qiwei Ren:
A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. CICC 2017: 1-4

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