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Kuen-Jong Lee
- > Home > Persons > Kuen-Jong Lee
Publications
- 2016
- [c60]Wei-Cheng Lien, Kuen-Jong Lee:
Output bit selection methodology for test response compaction. ITC 2016: 1-10 - 2014
- [j30]Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty:
Efficient LFSR Reseeding Based on Internal-Response Feedback. J. Electron. Test. 30(6): 673-685 (2014) - [j29]Yi-Hua Li, Wei-Cheng Lien, Ing-Chao Lin, Kuen-Jong Lee:
Capture-Power-Safe Test Pattern Determination for At-Speed Scan-Based Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(1): 127-138 (2014) - [c53]Wei-Cheng Lien, Kuen-Jong Lee, Krishnendu Chakrabarty, Tong-Yu Hsieh:
Output-bit selection with X-avoidance using multiple counters for test-response compaction. ETS 2014: 1-6 - [c51]Wei-Cheng Lien, Kuen-Jong Lee, Krishnendu Chakrabarty, Tong-Yu Hsieh:
Output selection for test response compaction based on multiple counters. VLSI-DAT 2014: 1-4 - [c50]Cheng-Hung Wu, Kuen-Jong Lee, Wei-Cheng Lien:
An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. VTS 2014: 1-6 - 2013
- [j27]Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty, Yu-Hua Wu:
Counter-Based Output Selection for Test Response Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(1): 152-164 (2013) - [j26]Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Wee-Lung Ang:
An Efficient On-Chip Test Generation Scheme Based on Programmable and Multiple Twisted-Ring Counters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8): 1254-1264 (2013) - [c49]Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty:
A New LFSR Reseeding Scheme via Internal Response Feedback. Asian Test Symposium 2013: 97-102 - 2012
- [c47]Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh:
A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume. Asian Test Symposium 2012: 278-283 - [c46]Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Shih-Shiun Chien, Krishnendu Chakrabarty:
Accumulator-based output selection for test response compaction. ISCAS 2012: 2313-2316 - [c45]Wei-Cheng Lien, Tong-Yu Hsieh, Kuen-Jong Lee:
Routing-efficient implementation of an internal-response-based BIST architecture. VLSI-DAT 2012: 1-4 - 2011
- [j23]Kuen-Jong Lee, Wei-Cheng Lien, Tong-Yu Hsieh:
Test Response Compaction via Output Bit Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(10): 1534-1544 (2011) - 2010
- [c42]Wei-Cheng Lien, Kuen-Jong Lee:
A Complete Logic BIST Technology with No Storage Requirement. Asian Test Symposium 2010: 129-134
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