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Yasushi Yuminaka

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Yosuke Iijima

> Home > Persons > Yasushi Yuminaka

Publications

2023
[j14]
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Kazuharu Nakajima, Yasushi Yuminaka, Yosuke Iijima:
Multi-Valued Data Transmission Quality Evaluation Using Two-Dimensional PAM-4 Symbol Mapping. FLAP 10(6): 973-991 (2023)
[c26]
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Yasushi Yuminaka, Kazuharu Nakajima, Yosuke Iijima:
PAM-4 Data Transmission Quality Evaluation Using Two- and Three-Dimensional Mapping of Received Symbols. ISMVL 2023: 94-98
[c25]
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Yosuke Iijima, Kazuharu Nakajima, Yasushi Yuminaka:
Evaluation and Symbol Classification of Multi-Valued Signaling Using Two-Dimensional Symbol Mapping with Linear Mixture Model. ISMVL 2023: 99-104
2022
[j13]
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  - journals/flap/IijimaY22
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Yosuke Iijima, Yasushi Yuminaka:
Efficient PAM-4 Symbol Estimation Using Soft Clustering. FLAP 9(3): 675-690 (2022)
[c23]
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Yosuke Iijima, Kazuharu Nakajima, Yasushi Yuminaka:
Two-Dimensional Symbol Mapping for Evaluating Multi-Valued Data Transmission Quality. ISMVL 2022: 170-175
2021
[j12]
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  - journals/ieicetd/IijimaTY21
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Yosuke Iijima, Keigo Taya, Yasushi Yuminaka:
PAM-4 Eye-Opening Monitor Technique Using Gaussian Mixture Model for Adaptive Equalization. IEICE Trans. Inf. Syst. 104-D(8): 1138-1145 (2021)
[c21]
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Yosuke Iijima, Yasushi Yuminaka:
Efficient PAM-4 Data Transmission with Closed Eye Using Symbol Distribution Estimation. ISMVL 2021: 195-200
2020
[j11]
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  - journals/flap/YuminakaSCTI20
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Yasushi Yuminaka, Natsuki Sato, Takahito Chigira, Kohei Toyoda, Yosuke Iijima:
PAM-4 Signal Transmitter using FPGA and DAC for Serial-link Test. FLAP 7(1): 29-40 (2020)
[c20]
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Yosuke Iijima, Keigo Taya, Yasushi Yuminaka:
PAM-4 Eye-Opening Monitoring Techniques Using Gaussian Mixture Model. ISMVL 2020: 149-154
2019
[c19]
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Yosuke Iijima, Yasushi Yuminaka:
Waveform Shaping Transmitter Combining Digital and Analog Circuits for Multi - Valued Signaling. ISMVL 2019: 19-24
2018
[c18]
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  - conf/ismvl/SatoCTIY18
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Natsuki Sato, Takahito Chigira, Kohei Toyoda, Yosuke Iijima, Yasushi Yuminaka:
Multi-valued Signal Generation and Measurement for PAM-4 Serial-Link Test. ISMVL 2018: 210-214
2017
[j9]
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  - journals/ieicet/IijimaY17
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Yosuke Iijima, Yasushi Yuminaka:
Double-Rate Tomlinson-Harashima Precoding for Multi-Valued Data Transmission. IEICE Trans. Inf. Syst. 100-D(8): 1611-1617 (2017)
[c17]
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Yasushi Yuminaka, Takuya Kitamura, Yosuke Iijima:
PAM-4 Eye Diagram Analysis and Its Monitoring Technique for Adaptive Pre-Emphasis for Multi-valued Data Transmissions. ISMVL 2017: 13-18
2016
[j8]
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  - journals/esticas/YuminakaI16
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Yasushi Yuminaka, Yosuke Iijima:
Multiple-Valued Signaling for High-Speed Serial Links Using Tomlinson-Harashima Precoding. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(1): 25-33 (2016)
[c16]
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Yosuke Iijima, Yasushi Yuminaka:
Double-Rate Equalization Using Tomlinson-Harashima Precoding for Multi-valued Data Transmission. ISMVL 2016: 66-71
2014
[j6]
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Yosuke Iijima, Yuki Takada, Yasushi Yuminaka:
High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding. IEICE Trans. Inf. Syst. 97-D(9): 2296-2303 (2014)
[c15]
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Yosuke Iijima, Yasushi Yuminaka:
Evaluation of High-Speed Interfaces for VLSI Systems Using Tomlinson-Harashima Precoding. ISMVL 2014: 138-143
[c14]
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Yasushi Yuminaka, Yuki Takada, Tomonao Okada, Yosuke Iijima:
Comparison of Spectrally Efficient Coding Techniques for High-Speed Serial Links. ISMVL 2014: 150-154

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