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Lionel Geynet

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2000 – 2009

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2008
[j1]
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  - journals/mj/JacquemodGNFTV08
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  - https://dblp.org/rec/journals/mj/JacquemodGNFTV08
Gilles Jacquemod, Lionel Geynet, Benjamin Nicolle, Emeric de Foucauld, William Tatinian, Pierre Vincent:
Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. Microelectron. J. 39(9): 1130-1139 (2008)
2005
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Benjamin Nicolle, Lionel Geynet, Emeric de Foucauld, William Tatinian, Gilles Jacquemod:
VHDL-AMS modeling of a multi-standard phase locked loop. ICECS 2005: 1-4

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