FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture.

Sat, 01 Jan 2005 00:00:00 +0100

Masanori Hariyama, Yasuhiro Kobayashi, Haruka Sasaki, Michitaka Kameyama:
FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3516-3522 (2005)