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ORCIDYixin Xu 0001
Person information
- affiliation: Pennsylvania State University, University Park, PA, USA
Other persons with the same name
- Yixin Xu — disambiguation page
- Yixin Xu 0002 — University of Melbourne, School of Computing and Information Systems, Melbourne, Australia
- Yixin Xu 0003
![[0009-0004-6802-1243]](https://dblp.org/img/orcid-mark.12x12.png "0009-0004-6802-1243")
— Nanjing University, Key Lab for Novel Software Technology, Nanjing, China
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2020 – today
- 2025
[c10]Varun Darshana Parekh, Yi Xiao, Yixin Xu, Zijian Zhao, Zhouhang Jiang, Rudra Biswas, Sumitha George, Kai Ni, Vijaykrishnan Narayanan:
A Study on the Impact of Temperature-Dependent Ferroelectric Switching Behavior in 3D Memory Architecture. VLSID 2025: 392-397- 2024
- [j3]Taixin Li, Boran Sun, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Liang Shi, Tianyi Wang, Yao Yu, Thomas Kämpfe, Kai Ni, Huazhong Yang, Xueqing Li:
ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories. ACM Trans. Design Autom. Electr. Syst. 29(1): 3:1-3:18 (2024) - [j2]Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Ziheng Zheng, Enze Ye, Sumitha George, Huazhong Yang, Yongpan Liu, Kai Ni, Vijaykrishnan Narayanan, Xueqing Li:
A Module-Level Configuration Methodology for Programmable Camouflaged Logic. ACM Trans. Design Autom. Electr. Syst. 29(2): 39:1-39:31 (2024) - [c9]Taixin Li, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Kai Ni, Huazhong Yang, Thomas Kämpfe, Xueqing Li:
REMNA: Variation-Resilient and Energy-Efficient MLC FeFET Computing-in-Memory Using NAND Flash-Like Read and Adaptive Control. ICCAD 2024: 76:1-76:9 - [c8]Sanwar Ahmed Ovy, Md Ashraful Islam Romel, Yi Xiao, Yixin Xu, Kai Ni, Sumitha George:
Compact Multiplexer Design with Multi-threshold Ferroelectric FETs. ISVLSI 2024: 735-739 - 2023
- [j1]Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2398-2411 (2023) - [c7]Jianfeng Wang, Zhonghao Chen, Yiming Chen, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Sumitha George, Huazhong Yang, Xueqing Li:
WeightLock: A Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators. AICAS 2023: 1-5 - [c6]Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li:
Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM. DAC 2023: 1-6 - [c5]Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. DAC 2023: 1-6 - [c4]Juejian Wu, Tianyu Liao, Taixin Li, Yixin Xu, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li:
Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices. ICCAD 2023: 1-9 - [c3]Yi Xiao, Yixin Xu, Shan Deng, Zijian Zhao, Sumitha George, Kai Ni, Vijaykrishnan Narayanan:
A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory. ISVLSI 2023: 1-6 - [c2]Hongtao Zhong, Yu Zhu, Longfei Luo, Taixin Li, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Yongpan Liu, Liang Shi, Huazhong Yang, Xueqing Li:
Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks. ISVLSI 2023: 1-6 - [i7]Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory. CoRR abs/2302.07478 (2023) - [i6]Zijian Zhao, Shan Deng, Swetaki Chatterjee, Zhouhang Jiang, Muhammad Shaffatul Islam, Yi Xiao, Yixin Xu, Scott Meninger, Mohamed Mohamed, Rajiv V. Joshi, Yogesh Singh Chauhan, Halid Mulaosmanovic, Stefan Dünkel, Dominik Kleimaier, Sven Beyer, Hussam Amrouch, Vijaykrishnan Narayanan, Kai Ni:
Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET. CoRR abs/2305.01484 (2023) - [i5]Yixin Xu, Yi Xiao, Zijian Zhao, Franz Müller, Alptekin Vardar, Xiao Gong, Sumitha George, Thomas Kämpfe, Vijaykrishnan Narayanan, Kai Ni:
Embedding Security into Ferroelectric FET Array via In-Situ Memory Operation. CoRR abs/2306.01863 (2023) - 2022
- [i4]Antik Mallick, Zijian Zhao, Mohammad Khairul Bashar, Shamiul Alam, Md. Mazharul Islam, Yi Xiao, Yixin Xu, Ahmedullah Aziz, Vijaykrishnan Narayanan, Kai Ni, Nikhil Shukla:
CMOS-Compatible Ising Machines built using Bistable Latches Coupled through Ferroelectric Transistor Arrays. CoRR abs/2205.14729 (2022) - [i3]Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Enze Ye, Ziheng Zheng, Huazhong Yang, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li:
ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key. CoRR abs/2206.08087 (2022) - [i2]Yixin Xu, Zijian Zhao, Yi Xiao, Tongguang Yu, Halid Mulaosmanovic, Dominik Kleimaier, Stefan Dünkel, Sven Beyer, Xiao Gong, Rajiv V. Joshi, X. Sharon Hu, Shixian Wen, Amanda Sofie Rios, Kiran Lekkala, Laurent Itti, Eric Homan, Sumitha George, Vijaykrishnan Narayanan, Kai Ni:
Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines. CoRR abs/2212.00089 (2022) - 2021
- [i1]Tongguang Yu, Yixin Xu, Shan Deng, Zijian Zhao, Nicholas Jao, You Sung Kim, Stefan Dünkel, Sven Beyer, Kai Ni, Sumitha George, Vijaykrishnan Narayanan:
Hardware Functional Obfuscation With Ferroelectric Active Interconnects. CoRR abs/2110.03855 (2021) - 2020
- [c1]Juejian Wu, Yixin Xu, Bowen Xue, Yu Wang, Yongpan Liu, Huazhong Yang, Xueqing Li:
Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory. ASP-DAC 2020: 407-413
Coauthor Index
aka: Vijaykrishnan Narayanan
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