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Zhiliang Hong
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
Person information
Other persons with the same name
- Zhiliang Hong 0001
— Fudan University, Key Laboratory of Integrated Chips and Systems, Shanghai, China - Zhiliang Hong 0002
— Fujian Medical University, Shengli Clinical Medical College, Fujian, China (and 1 more)
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2020 – today
- 2025
[c69]Liangbo Lei, Yanxiang Chen, Yijie Li
, Zhiliang Hong, Yumei Huang:
11.5 A 200MHz-BW Blocker-Tolerant Receiver with Fifth-Order Filtering Achieving 19dBm Adjacent-Channel IIP3. ISSCC 2025: 222-224- 2023
[c68]Xiaohan Zhang, Tao Wang, Lingyun Shi, Di Hua, Zhiliang Hong:
A 7W, 2.5-5GHz Wideband GaN PA with Transformer-Based Matching Network. ASICON 2023: 1-4
[c67]Chaoyang Zheng, Zhipeng Chen, Jianhua Lu, Yan Ma, Yumei Huang, Zhiliang Hong:
A 400M-510MHz On-Chip Transformer-Based RF Power Amplifier with 22.5dBm Output Power and 48% PAE. ASICON 2023: 1-4
[c66]Cong Tao, Liangbo Lei, Zhiliang Hong, Yumei Huang:
A 50-MHz Bandwidth and 50.6-dBm OOB-IIP3 Transimpedance Amplifier Based on a Three-Stage Pseudo-Differential OTA. ISCAS 2023: 1-4- 2022
[c65]Liangbo Lei, Cong Tao, Zhipeng Chen, Zhiliang Hong, Yumei Huang:
A 5.4-mW 50-MHz 29.3-dBm-IIP3 Fourth-Order Low-Pass Filter. ESSCIRC 2022: 477-480
[c64]Cong Tao, Liangbo Lei, Zhiliang Hong, Yumei Huang:
Wide-Band Inductorless and Capacitorless LNTA Based on Cascode Inverters. ISCAS 2022: 3073-3076
[c63]Cong Tao, Liangbo Lei, Zhipeng Chen, Zhiliang Hong, Yumei Huang:
A 50MHz Bandwidth TIA Based on Two Stage Pseudo-Differential OTA with Cascode Negative Resistance and R-C Compensation Technique. MWSCAS 2022: 1-4- 2021
[c62]Zhen Lu, Ting Yi, Zhiliang Hong:
A Review of PPG/NIRS Acquisition ASIC and System. ASICON 2021: 1-4
[c61]Cong Tao, Liangbo Lei, Jiangli Huang, Zhipeng Chen, Yumei Huang, Zhiliang Hong:
New Linearization Implementations Improving IIP3 of Wideband LNTA by More than 14dB. ASICON 2021: 1-4
[c60]Peizhuo Wang, Ting Yi, Zhiliang Hong:
High-Input-Impedance Amplifiers Design for Dry-Electrode Biopotential Acquisition: A Review. ASICON 2021: 1-4
[c59]Tingting Wei, Qiong Wang, Zhu Yuan, Zhiliang Hong:
A Low Power Real-Time DC Removal Circuit for PPG Readout. ASICON 2021: 1-3
[c58]Ruijie Yan, Lihan Cui, Zhiliang Hong:
A Fourth Order Chebyshev Complex Band-pass Filter Design with Filter Solution. ASICON 2021: 1-4
[c57]Chao Yuan, Ting Yi, Zhiliang Hong:
High Precision AFE Design Methodology for Wearable EEG Acquisition. ASICON 2021: 1-4
[c56]Weiqi Zhi, Ting Yi, Zhiliang Hong:
A Review and Perspective on Electrode Patch-Based Fetal ECG Monitoring ASIC. ASICON 2021: 1-4
[c55]Peng Cao
, Zhiliang Hong:
A Bipolar-Input Bipolar-Output DC-DC Converter for Thermoelectric Energy Harvesting. ISCAS 2021: 1-4
[c54]Liangbo Lei, Cong Tao, Zhiliang Hong, Yumei Huang:
A 5.7mW +30dBm IIP3, Tunable Active-RC LPF in 40nm CMOS. ISCAS 2021: 1-4
2010 – 2019
- 2019
[c53]Hejia Cai, Yan Hu, Zhiliang Hong:
A35.2 dBm CMOS RF Power Amplifier Using an 8-Way Current-Voltage Combining Transformer with Harmonic Control. ASICON 2019: 1-4
[c52]Mingfeng Chen, Fuqiang Liu, Heng Ma, Zhiliang Hong:
High-Bandwidth Wide-Output-Swing Linear Amplifier for LTE-100MHz Envelope Tracking. ASICON 2019: 1-4
[c51]Yan Hu, Tao Wang, Zhiliang Hong:
The Digital Front End with Dual-box Digital Pre-distortion in All-digital Quadrature Transmitter. ASICON 2019: 1-4
[c50]Jieyang Li, Ting Yi, Zhiliang Hong:
A wide range and high resolution two-step TDC for millimeter-wave band ADPLL. ASICON 2019: 1-4
[c49]Fuqiang Liu, Mingfeng Chen, Heng Ma, Zhiliang Hong:
Dual-Loop-Controlled AC-Coupling 100MHz Bandwidth Envelope Tracking Modulator for 5G RF Power Amplifier. ASICON 2019: 1-4
[c48]Dehong Lv, Heng Ma, Fuqiang Liu, Zhiliang Hong:
A curvature corrected bandgap reference with mismatch cancelling and noise reduction. ASICON 2019: 1-4
[c47]Tao Wang, Hejia Cai, Yan Hu, Pan Xue, Zhiliang Hong:
A Compact Quadrature Doherty Digital Power Amplifier with Backoff Efficiency Enhancement. ASICON 2019: 1-3- 2018
[j10]Wenlong Lyu
, Pan Xue, Fan Yang
, Changhao Yan, Zhiliang Hong, Xuan Zeng
, Dian Zhou:
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1954-1967 (2018)
[c46]Jianguo Yang, Xing Li, Tao Wang, Xiaoyong Xue, Zhiliang Hong, Yuanyuan Wang, David Wei Zhang, Hongliang Lu:
A Physically Unclonable Function with BER < 0.35% for Secure Chip Authentication Using Write Speed Variation of RRAM. ESSDERC 2018: 54-57
[c45]Pan Xue, Haijun Shao, Dan Fang, Gan Guo, Wei Che, Zhiliang Hong:
A Digital ΣΔ Modulated Class-S Transmitter with Two-Step Up-conversion and Filter-less Front End. ISOCC 2018: 27-28
[c44]Yuan Gao, Zhiliang Hong, Axel Thomsen:
Session 8 overview: Wireless power and harvesting: Power management subcommittee. ISSCC 2018: 134-135- 2017
[j9]Han Jin, Yajie Qin
, Hao Liang, Lei Wan, Hao Lan, Guoping Chen
, Ran Liu, Li-Rong Zheng, Patrick Chiang, Zhiliang Hong:
A Mobile-Based High Sensitivity On-Field Organophosphorus Compounds Detecting System for IoT-Based Food Safety Tracking. J. Sensors 2017: 8797435:1-8797435:13 (2017)
[j8]Yao Qian, Hongguang Zhang, Yanqin Chen, Yajie Qin, Danzhu Lu, Zhiliang Hong:
A SIDIDO DC-DC Converter With Dual-Mode and Programmable-Capacitor-Array MPPT Control for Thermoelectric Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 64-II(8): 952-956 (2017)
[c43]Haijun Shao, Dan Fan, Pan Xue, Hongguang Zhang, Yilei Shen, Yumei Huang, Gan Guo, Zhiliang Hong:
A LTE digital mixer with 25% duty quadrature 4-phase clocks. ASICON 2017: 104-107
[c42]Xiaofei Hu, Xiao Ge, Ting Yi, Danzhu Lu, Zhiliang Hong:
A 1.2V output RF energy harvester with a harvesting-efficiency tracking circuit. ASICON 2017: 830-834
[c41]Chenyang Wang, Yilei Shen, Pan Xue, Zhiliang Hong:
The implement of digital front end in all-digital quadrature RF transmitter. ASICON 2017: 900-903
[c40]Xiao Ge, Xiaofei Hu, Yajie Qin, Zhiliang Hong:
A single inductor tri-input dual-output buck-boost DC-DC converter with MPPT for multi-source energy harvesting. ASICON 2017: 940-943
[c39]Hongguang Zhang, Pan Xue, Zhiliang Hong:
A 4.6-5.6 GHz constant KVCO low phase noise LC-VCO and an optimized automatic frequency calibrator applied in PLL frequency synthesizer. IECON 2017: 8337-8342
[e1]Yajie Qin, Zhiliang Hong, Ting-Ao Tang:
12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017. IEEE 2017, ISBN 978-1-5090-6625-4 [contents]- 2016
[j7]Yang Zhao
, Yilei Shen, Pan Xue, Zhiwei Ma, Zhenfei Peng, Bao-Xing Chen
, Zhiliang Hong:
An All-Digital Gigahertz Class-S Transmitter in a 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1402-1411 (2016)- 2015
[c38]Yanqin Chen, Hongguang Zhang, Xu Guo, Zhiliang Hong:
A 400mV supply voltage self-start clock generator for energy harvest system. ASICON 2015: 1-3
[c37]Shuo Li, Nan Qi, Vahid Behravan, Zhiliang Hong, Patrick Yin Chiang:
A 20 μW dual-channel analog front-end in 65nm CMOS for portable ECG monitoring system. ASICON 2015: 1-4
[c36]Pan Xue, Yilei Shen, Yang Zhao, Zhiliang Hong:
An all-digital quadrature RF transmitter with 8-bit ΣΔ modulation. ASICON 2015: 1-4
[c35]Feng Ye, Haijun Wang, Ting Yi, Zhiliang Hong:
A 14-bit 2-GS/s DAC with a programmable interpolation filter. ASICON 2015: 1-4- 2014
[c34]Rongtao Hu, Yajie Qin, Yinghong Tian, Zhiliang Hong, Geng Yang, Li-Rong Zheng, Jie Jia, Cuiwei Yang, Xiaomei Wu, Yuanyuan Wang:
Biofeedback neuromuscular electrical stimulation front-end for dysphagia treatment. BioCAS 2014: 612-615
[c33]Danzhu Lu, Yao Qian, Zhiliang Hong:
4.3 An 87%-peak-efficiency DVS-capable single-inductor 4-output DC-DC buck converter with ripple-based adaptive off-time control. ISSCC 2014: 82-83- 2013
[j6]Shanshan Dai, Xiaofei Cao, Ting Yi, Allyn E. Hubbard, Zhiliang Hong:
1-V Low-Power Programmable Rail-to-Rail Operational Amplifier With Improved Transconductance Feedback Technique. IEEE Trans. Very Large Scale Integr. Syst. 21(10): 1928-1935 (2013)
[c32]Qiuli Li, Yao Qian, Danzhu Lu, Zhiliang Hong:
VCCS controlled LDO with small on-chip capacitor. ASICON 2013: 1-4
[c31]Yang Zhao
, Bill Yang Liu, Zhiliang Hong:
Design of a time-interleaved band-pass ΣΔ modulator for Class-S power amplifier. ASICON 2013: 1-4
[c30]Lei Wan, Yajie Qin, Patrick Chiang, Guoping Chen, Ran Liu, Zhiliang Hong:
High-sensitivity photodetection sensor front-end, detecting organophosphourous compounds for food safety. CICC 2013: 1-4
[c29]Jing Li, Ruiyuan Zhu, Ting Yi, Bill Liu, Zhiliang Hong:
An energy-efficient 5-MHz to 20-MHz, 12-bit reconfigurable continuous-time ΣΔ modulator for 4G-LTE application. ISLPED 2013: 163-168- 2012
[j5]Yi Zhao, Shenjie Wang, Zhiliang Hong:
A sub-sampling 4.25 GS/s 3-bit flash ADC with asymmetric spatial filter response. Microelectron. J. 43(6): 337-344 (2012)
[c28]Jiao Cheng, Lingli Xia, Chao Ma, Yong Lian
, Xiaoyuan Xu, C. Patrick Yue
, Zhiliang Hong, Patrick Yin Chiang:
A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting. CICC 2012: 1-4
[c27]Danzhu Lu, Jiale Yu, Zhiliang Hong, Jingwen Mao, Hui Zhao, Eric Cirot:
A 10MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimization. ESSCIRC 2012: 333-336
[c26]Chen Jiang, Junren Liu, Yumei Huang, Zhiliang Hong:
A low-noise, 8.95-11GHz all-digital frequency synthesizer with a metastability-free time-to-digital converter and a sleepy counter in 65nm CMOS. ESSCIRC 2012: 365-368- 2011
[j4]Lingli Xia, Hu Chen, Yumei Huang, Zhiliang Hong, Patrick Yin Chiang:
100-phase, dual-loop delay-locked loop for impulse radio ultra-wideband coherent receiver synchronisation. IET Circuits Devices Syst. 5(6): 484-493 (2011)
[c25]Jing Li, Ran Li, Ting Yi, Zhiliang Hong, Bill Yang Liu:
VLSI implementation of high-speed low power decimation filter for LTE sigma-delta A/D converter application. ASICON 2011: 453-456
[c24]Ran Li, Qi Zhao, Ting Yi, Zhiliang Hong:
A 14-bit 2-GS/s DAC with SFDR>70dB up to 1-GHz in 65-nm CMOS. ASICON 2011: 500-503
[c23]Yi Zhao, Jun Jiang, Ke Shao, Yajie Qin, Zhiliang Hong:
A low-power 4.224GS/s sampler in 0.13-µm CMOS for IR UWB receiver. ASICON 2011: 512-515
[c22]Song Hu, Weinan Li, Yumei Huang, Zhiliang Hong:
Design of a low-power low-phase-noise multi-mode divider with 25%-duty-cycle outputs in 0.13µm CMOS. ASICON 2011: 594-597
[c21]Chunchen Gu, Yi Zhao, Zhiliang Hong:
A 4GS/s 3b two-way time-interleaved ADC in 0.13um CMOS. ASICON 2011: 1002-1005
[c20]Xingli Huang, Xi Qin, Yajie Qin, Hao Fang, Zhiliang Hong:
A 0.8-3GHz 40dB dynamic range CMOS variable-gain amplifier. ASICON 2011: 1030-1033
[c19]Renzhong Xie, Chen Jiang, Weinan Li, Yumei Huang, Zhiliang Hong:
A dual-mode analog baseband utilizing digital-assisted calibration for WCDMA/GSM receivers. ASICON 2011: 1058-1061
[c18]Chen Jiang, Renzhong Xie, Weinan Li, Yumei Huang, Zhiliang Hong:
Reconfigurable low pass filter with Automatic Frequency Tuning for WCDMA and GSM application. ASICON 2011: 1066-1069
[c17]Song Hu, Weinan Li, Yumei Huang, Zhiliang Hong:
Design of a high-linearity RF front-end with IP2 calibration for SAW-less WCDMA receivers. ASICON 2011: 1090-1093
[c16]Dong Qiu, Ting Yi, Zhiliang Hong:
A low-power triple-mode sigma-delta DAC for reconfigurable (WCDMA/TD-SCDMA/GSM) transmitters. ASP-DAC 2011: 119-120
[c15]Nan Lin, Fei Fang, Zhiliang Hong, Hao Fang:
A CMOS broadband precise programmable gain amplifier with bandwidth extension technique. A-SSCC 2011: 225-228
[c14]Xiaohan Gong, Jinhua Ni, Zhiliang Hong, Bill Liu:
An 80% peak efficiency, 0.84mW sleep power consumption, fully-integrated DC-DC converter with buck/LDO mode control. CICC 2011: 1-4
[c13]Zhenfei Peng, Shanshan Yang, Yong Feng, Zhiliang Hong, Bill Liu:
An 80% peak efficiency, 410mW, single supply rail powered Class-I linear audio amplifier. CICC 2011: 1-4
[c12]Weiwei Xu, Ye Li, Zhiliang Hong, Dirk Killat, Horst Schleifer:
A single-inductor multiple-bipolar-output (SIMBO) converter with fully-adaptive feedback matrix and improved light-load ripple. ESSCIRC 2011: 435-438
[c11]Lin Cheng
, Jinhua Ni, Zhiliang Hong, Bill Yang Liu:
A constant off-time controlled boost converter with adaptive current sensing technique. ESSCIRC 2011: 443-446
[c10]Weiwei Xu, Ye Li, Zhiliang Hong, Dirk Killat:
A 90% peak efficiency single-inductor dual-output buck-boost converter with extended-PWM control. ISSCC 2011: 394-396- 2010
[j3]Wei-yang Xu, Bo Lu, Xing-bo Hu, Zhi-Liang Hong:
Blind carrier frequency offset estimation for constant modulus signaling based OFDM systems: algorithm, identifiability, and performance analysis. J. Zhejiang Univ. Sci. C 11(1): 14-26 (2010)
[c9]Wen-Hui Fu, Jun Jiang, Xi Qin, Ting Yi, Zhiliang Hong:
A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks. FPL 2010: 211-216
[c8]Weiyang Xu, Zhiliang Hong:
Blind CFO Estimation for Constant Modulus Signaling Based OFDM Systems. ICC 2010: 1-5
[c7]Shenjie Wang, Zhiliang Hong:
Design of 4-bit parallel sub-sampling A/D converter for IR-UWB receiver. ICECS 2010: 1049-1052
2000 – 2009
- 2009
[c6]Weiwei Xu, Ye Li, Xiaohan Gong, Zhiliang Hong, Dirk Killat:
A single-inductor dual-output switching converter with low ripples and improved cross regulation. CICC 2009: 303-306
[c5]Jinhua Ni, Zhiliang Hong, Bill Yang Liu:
Improved on-chip components for integrated DC-DC converters in 0.13 µm CMOS. ESSCIRC 2009: 448-451- 2008
[c4]Lingli Xia, Weinan Li, Yumei Huang, Zhiliang Hong:
A 3-5GHz amplitude and spectrum tunable impulse radio UWB transmitter. APCCAS 2008: 160-163
[c3]Weinan Li, Lingli Xia, Yumei Huang, Zhiliang Hong:
A 0.13μm CMOS UWB receiver front-end using passive mixer. APCCAS 2008: 288-291
[c2]Feng Zhao, Xiaoping Gao, Huajiang Zhang, Kangmin Hu, Zhiliang Hong:
A CMOS 434/868 MHz FSK/OOK transmitter with integrated fractional-N PLL. APCCAS 2008: 546-549
[c1]Weiwei Xu, Xiaoting Zhu, Zhiliang Hong, Dirk Killat:
Design of single-inductor dual-output switching converters with average current mode control. APCCAS 2008: 902-905- 2004
[j2]Quanping Huang, Rongzheng Zhou, Zhiliang Hong:
Low memory and low complexity VLSI implementation of JPEG2000 codec. IEEE Trans. Consumer Electron. 50(2): 638-646 (2004)- 2002
[j1]Xiao-Jun Zeng, Zhi-Liang Hong:
Design and implementation of a turbo decoder for 3G W-CDMA systems. IEEE Trans. Consumer Electron. 48(2): 284-291 (2002)
Coauthor Index

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