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ORCIDAlexander Nadel
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2020 – today
- 2020
[j3]Alexander Nadel:
Polarity and Variable Selection Heuristics for SAT-Based Anytime MaxSAT. J. Satisf. Boolean Model. Comput. 12(1): 17-22 (2020)- [c27]Alexander Nadel:
Anytime Algorithms for MaxSAT and Beyond. FMCAD 2020: 1 - [c26]Alexander Nadel:
On Optimizing a Generic Function in SAT. FMCAD 2020: 205-213
2010 – 2019
- 2019
- [c25]Alexander Nadel
:
Anytime Weighted MaxSAT with Improved Polarity Selection and Bit-Vector Optimization. FMCAD 2019: 193-202 - 2018
- [c24]Alexander Nadel:
Solving MaxSAT with Bit-Vector Optimization. SAT 2018: 54-72 - [c23]Alexander Nadel, Vadim Ryvchin:
Chronological Backtracking. SAT 2018: 111-121 - 2017
- [c22]Alexander Nadel:
A Correct-by-Decision Solution for Simultaneous Place and Route. CAV (2) 2017: 436-452 - [c21]Yakir Vizel, Alexander Nadel, Sharad Malik:
Solving linear arithmetic with SAT-based model checking. FMCAD 2017: 47-54 - 2016
- [c20]Alexander Nadel:
Routing under constraints. FMCAD 2016: 125-132 - [c19]Alexander Nadel, Vadim Ryvchin:
Bit-Vector Optimization. TACAS 2016: 851-867 - 2015
- [j2]Yakir Vizel, Alexander Nadel, Vadim Ryvchin:
Efficient generation of small interpolants in CNF. Formal Methods Syst. Des. 47(1): 51-74 (2015) - [c18]Amit Erez, Alexander Nadel:
Finding Bounded Path in Graph Using SMT for Automatic Clock Routing. CAV (2) 2015: 20-36 - 2014
- [j1]Alexander Nadel, Vadim Ryvchin, Ofer Strichman:
Accelerated Deletion-based Extraction of Minimal Unsatisfiable Cores. J. Satisf. Boolean Model. Comput. 9(1): 27-51 (2014) - [c17]Alexander Nadel:
Bit-Vector Rewriting with Automatic Rule Generation. CAV 2014: 663-679 - [c16]Alexander Nadel, Vadim Ryvchin, Ofer Strichman:
Ultimately Incremental SAT. SAT 2014: 206-218 - 2013
- [c15]Yakir Vizel, Vadim Ryvchin, Alexander Nadel:
Efficient Generation of Small Interpolants in CNF. CAV 2013: 330-346 - [c14]Alexander Nadel, Vadim Ryvchin, Ofer Strichman:
Efficient MUS extraction with resolution. FMCAD 2013: 197-200 - 2012
- [c13]Alexander Nadel, Vadim Ryvchin:
Efficient SAT Solving under Assumptions. SAT 2012: 242-255 - [c12]Alexander Nadel, Vadim Ryvchin, Ofer Strichman:
Preprocessing in Incremental SAT. SAT 2012: 256-269 - 2011
- [c11]Zurab Khasidashvili, Alexander Nadel:
Implicative Simultaneous Satisfiability and Applications. Haifa Verification Conference 2011: 66-79 - [c10]Alexander Nadel:
Generating Diverse Solutions in SAT. SAT 2011: 287-301 - [i2]Nachum Dershowitz, Alexander Nadel:
From Total Assignment Enumeration to Modern SAT Solver. CoRR abs/1110.5867 (2011) - 2010
- [c9]Sabih Agbaria, Dan Carmi, Orly Cohen, Dmitry Korchemny, Michael Lifshits, Alexander Nadel:
SAT-based semiformal verification of hardware. FMCAD 2010: 25-32 - [c8]Anders Franzén, Alessandro Cimatti, Alexander Nadel, Roberto Sebastiani, Jonathan Shalev:
Applying SMT in symbolic execution of microcode. FMCAD 2010: 121-128 - [c7]Alexander Nadel:
Boosting minimal unsatisfiable core extraction. FMCAD 2010: 221-229 - [c6]Alexander Nadel, Vadim Ryvchin:
Assignment Stack Shrinking. SAT 2010: 375-381
2000 – 2009
- 2007
- [c5]Roberto Bruttomesso, Alessandro Cimatti, Anders Franzén, Alberto Griggio, Ziyad Hanna, Alexander Nadel, Amit Palti, Roberto Sebastiani:
A Lazy and Layered SMT($\mathcal{BV}$) Solver for Hard Industrial Verification Problems. CAV 2007: 547-560 - [c4]Nachum Dershowitz, Ziyad Hanna, Alexander Nadel:
Towards a Better Understanding of the Functionality of a Conflict-Driven SAT Solver. SAT 2007: 287-293 - 2006
- [c3]Nachum Dershowitz, Ziyad Hanna, Alexander Nadel:
A Scalable Algorithm for Minimal Unsatisfiable Core Extraction. SAT 2006: 36-41 - [i1]Nachum Dershowitz, Ziyad Hanna, Alexander Nadel:
A Scalable Algorithm for Minimal Unsatisfiable Core Extraction. CoRR abs/cs/0605085 (2006) - 2005
- [c2]Zurab Khasidashvili, Alexander Nadel, Amit Palti, Ziyad Hanna:
Simultaneous SAT-Based Model Checking of Safety Properties. Haifa Verification Conference 2005: 56-75 - [c1]Nachum Dershowitz, Ziyad Hanna, Alexander Nadel:
A Clause-Based Heuristic for SAT Solvers. SAT 2005: 46-60
Coauthor Index
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