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ORCIDEdward B. Eichelberger
Person information
- affiliation: IBM, Kingston, New York, USA
- award (1989): W. Wallace McDowell Award
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1990 – 1999
- 1991
[j6]Edward B. Eichelberger, Stephen E. Bello:
Differential current switch-High performance at low power. IBM J. Res. Dev. 35(3): 313-320 (1991)- [c7]Venkappa L. Gani, Matthew Graf, Keith Mathews, Edward B. Eichelberger:
IBM ES/9000 model 320 air cooled computer technology. Compcon 1991: 309-313
1980 – 1989
- 1989
- [j5]John A. Waicukauski, Eric Lindbloom, Edward B. Eichelberger, Orazio P. Forlenza:
A Method for Generating Weighted Random Test Patterns. IBM J. Res. Dev. 33(2): 149-161 (1989) - 1985
- [c6]Edward B. Eichelberger:
Experiences and Expectations in VLSI Testing. ITC 1985: 4 - [c5]John A. Waicukauski, Eric Lindbloom, Edward B. Eichelberger, Donato O. Forlenza, Tim McCarthy:
A Statistical Calculation of Fault Detection Probabilities By Fast Fault Simulation. ITC 1985: 779-784 - 1983
- [j4]Edward B. Eichelberger, Eric Lindbloom:
Random-Pattern Coverage Enhancement and Diagnosis for LSSD Logic Self-Test. IBM J. Res. Dev. 27(3): 265-272 (1983) - [c4]Franco Motika, John A. Waicukauski, Edward B. Eichelberger, Eric Lindbloom:
An LSSD Pseudo Random Pattern Test System. ITC 1983: 283-288 - 1980
- [j3]Edward B. Eichelberger, Eric Lindbloom:
A Heuristic Test-Pattern Generator for Programmable Logic Arrays. IBM J. Res. Dev. 24(1): 15-22 (1980)
1970 – 1979
- 1978
- [j2]Hollis L. Caswell, William C. Holton, Richard J. Petschauer, George A. Brown, S. Krishnaswamy, Herbert Stopper, Daniel H. Carter, William Lattin, Robert M. Sullivan, Edward B. Eichelberger, Paul Losleben:
The Oregon Report Basic Technology. Computer 11(9): 10-19 (1978) - 1977
- [c3]Edward B. Eichelberger, Thomas W. Williams:
A logic design structure for LSI testability. DAC 1977: 462-468
1960 – 1969
- 1965
- [j1]Edward B. Eichelberger:
Hazard Detection in Combinational and Sequential Switching Circuits. IBM J. Res. Dev. 9(2): 90-99 (1965) - 1964
- [c2]Edward B. Eichelberger:
Hazard detection in combinational and sequential switching circuits. SWCT 1964: 111-120 - 1963
- [c1]Edward B. Eichelberger:
Sequential circuit synthesis using input delays. SWCT 1963: 105-116
Coauthor Index
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