BibTeX records: Hank Cheng

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@inproceedings{DBLP:conf/isscc/ChangCCCWLFLLWY20,
  author    = {Jonathan Chang and
               Yen{-}Huei Chen and
               Gary Chan and
               Hank Cheng and
               Po{-}Sheng Wang and
               Yangsyu Lin and
               Hidehiro Fujiwara and
               Robin Lee and
               Hung{-}Jen Liao and
               Ping{-}Wei Wang and
               Geoffrey Yeap and
               Quincy Li},
  title     = {15.1 {A} 5nm 135Mb {SRAM} in {EUV} and High-Mobility-Channel FinFET
               Technology with Metal Coupling and Charge-Sharing Write-Assist Circuitry
               Schemes for High-Density and Low-VMIN Applications},
  booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
               2020, San Francisco, CA, USA, February 16-20, 2020},
  pages     = {238--240},
  publisher = {{IEEE}},
  year      = {2020},
  url       = {https://doi.org/10.1109/ISSCC19947.2020.9062967},
  doi       = {10.1109/ISSCC19947.2020.9062967},
  timestamp = {Sat, 18 Apr 2020 17:41:44 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/ChangCCCWLFLLWY20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChangCCSCFLLHLL17,
  author    = {Jonathan Chang and
               Yen{-}Huei Chen and
               Wei{-}Min Chan and
               Sahil Preet Singh and
               Hank Cheng and
               Hidehiro Fujiwara and
               Jih{-}Yu Lin and
               Kao{-}Cheng Lin and
               John Hung and
               Robin Lee and
               Hung{-}Jen Liao and
               Jhon{-}Jhy Liaw and
               Quincy Li and
               Chih{-}Yung Lin and
               Mu{-}Chi Chiang and
               Shien{-}Yang Wu},
  title     = {12.1 {A} 7nm 256Mb {SRAM} in high-k metal-gate FinFET technology with
               write-assist circuitry for low-VMIN applications},
  booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2017, San Francisco, CA, USA, February 5-9, 2017},
  pages     = {206--207},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.1109/ISSCC.2017.7870333},
  doi       = {10.1109/ISSCC.2017.7870333},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/ChangCCSCFLLHLL17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ClintonCLLWYHWY17,
  author    = {Michael Clinton and
               Hank Cheng and
               Hung{-}Jen Liao and
               Robin Lee and
               Ching{-}Wei Wu and
               Johnny Yang and
               Hau{-}Tai Hsieh and
               Frank Wu and
               Jung{-}Ping Yang and
               Atul Katoch and
               Arun Achyuthan and
               Donald Mikan and
               Bryan Sheffield and
               Jonathan Chang},
  title     = {12.3 {A} low-power and high-performance 10nm {SRAM} architecture for
               mobile applications},
  booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
               2017, San Francisco, CA, USA, February 5-9, 2017},
  pages     = {210--211},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.1109/ISSCC.2017.7870335},
  doi       = {10.1109/ISSCC.2017.7870335},
  timestamp = {Wed, 10 Jul 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/ClintonCLLWYHWY17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChangCCCLLCNLWLWCCC13,
  author    = {Jonathan Chang and
               Yen{-}Huei Chen and
               Hank Cheng and
               Wei{-}Min Chan and
               Hung{-}Jen Liao and
               Quincy Li and
               Stanley Chang and
               Sreedhar Natarajan and
               Robin Lee and
               Ping{-}Wei Wang and
               Shyue{-}Shyh Lin and
               Chung{-}Cheng Wu and
               Kuan{-}Lun Cheng and
               Min Cao and
               George H. Chang},
  title     = {A 20nm 112Mb {SRAM} in High-{\cyrchar\cyrk} metal-gate with assist
               circuitry for low-leakage and low-VMIN applications},
  booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
               of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
               17-21, 2013},
  pages     = {316--317},
  publisher = {{IEEE}},
  year      = {2013},
  url       = {https://doi.org/10.1109/ISSCC.2013.6487750},
  doi       = {10.1109/ISSCC.2013.6487750},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/ChangCCCLLCNLWLWCCC13.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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