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2020 – today
- 2024
[c6]Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui Paulo Martins, Quan Pan:
A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOS. CICC 2024: 1-2- [c5]Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment. ISSCC 2024: 204-206 - 2023
- [j6]Zehao Zhang, Shiheng Yang
, Yueduo Liu, Zihao Zhu, Jiahui Lin, Rongxin Bao, Tailong Xu, Zhizhan Yang, Mingkang Zhang, Jiaxin Liu, Xiong Zhou, Jun Yin, Pui-In Mak, Qiang Li:
On the DC-Settling Process of the Pierce Crystal Oscillator in Start-Up. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 26-30 (2023) - [c4]Zhikuang Cai, Xin Wang, Zixuan Wang, Yunjin Yin, Wenjing Zhang, Tailong Xu, Yufeng Guo:
A 16MHz X0 with 17.5μs Startup Time Under 104ppm-ΔF Injection Using Automatic Phase-Error Correction Technique. ISSCC 2023: 66-67 - 2022
- [j5]Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 6-to-7.5-GHz 54-fsrms Jitter Type-II Reference-Sampling PLL Featuring a Gain-Boosting Phase Detector for In-Band Phase-Noise Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4774-4786 (2022) - 2021
- [j4]Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, Rui Paulo Martins:
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3108-3112 (2021) - 2020
- [j3]Vikram Dhillon, Tailong Xu, Chirag Parikh:
Blockchain Enabled Tracking of Physician Burnout and Stressors During the COVID-19 Pandemic. Frontiers Blockchain 3: 586742 (2020)
2010 – 2019
- 2017
- [c3]Tailong Xu, Feng Xue, Zhikuang Cai, Xinning Liu, Shuo Meng:
A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC. ASICON 2017: 167-170 - 2016
- [j2]Hong Chang, Te Peng, Daoming Ke, Tailong Xu, Jian Meng:
Design and implementation of elastic buffer for Universal Serial Bus 3.0. IEICE Electron. Express 13(5): 20151084 (2016) - 2013
- [j1]Zhikuang Cai, Tailong Xu, Haiyan Sun, Longxing Shi:
A wide-range and ultra fast-locking all-digital SAR DLL without harmonic-locking. IEICE Electron. Express 10(22): 20130494 (2013) - [c2]Zao Liu, Tailong Xu, Sheldon X.-D. Tan, Hai Wang:
Dynamic thermal management for multi-core microprocessors considering transient thermal effects. ASP-DAC 2013: 473-478 - 2012
- [c1]Xuexin Liu, Sheldon X.-D. Tan, Zao Liu, Hai Wang, Tailong Xu:
Transient analysis of large linear dynamic networks on hybrid GPU-multicore platforms. NEWCAS 2012: 173-176
Coauthor Index
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