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Nobuya Watanabe

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2020 – today

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2026
[c28]
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  - conf/iccel/IsobeWW26
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Masato Isobe, Minoru Watanabe, Nobuya Watanabe:
Soft-error measurement for a radiation-hardened RISC-V processor. ICCE 2026: 1-5
[c27]
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  - conf/iccel/KurokawaWW26
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Haruto Kurokawa, Minoru Watanabe, Nobuya Watanabe:
An implementation of a quantum algorithm on a Cyclone FPGA. ICCE 2026: 1-2
[c26]
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  - conf/iccel/NagamineWW26
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Naoki Nagamine, Minoru Watanabe, Nobuya Watanabe:
OpenOCD-Compliant Radiation-Hardened JTAG Interface for Optically Reconfigurable Gate Array VLSIs. ICCE 2026: 1-6
[c25]
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  - conf/iccel/OguraWW26
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Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe:
Flip-flop resource expansion method for FPGAs using latches created on look-up tables. ICCE 2026: 1-4
[c24]
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Nobuya Watanabe, Minoru Watanabe:
Mono Instruction Set Computer design using a high-level hardware description language. ICCE 2026: 1-6
2025
[c23]
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  - conf/ciis/SekiokaWW25
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Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe:
Delay adjustment circuit for a triple modular redundant communication system used for radiation-hardened robots. CIIS 2025: 101-106
[c22]
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  - conf/eidwt/SeoTWL25
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Yukito Seo, Kosuke Takano, Nobuya Watanabe, Kin Fun Li:
Reliability Calculation for Captured Images in Mobile Observation for Natural Environments. EIDWT 2025: 43-53
[c21]
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  - conf/iccel/ImaiWW25
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Soma Imai, Minoru Watanabe, Nobuya Watanabe:
Implementation of Mono Instruction Set Computer with Small Register Files. ICCE 2025: 1-3
[c20]
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  - conf/iccel/NagamineWW25
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Naoki Nagamine, Minoru Watanabe, Nobuya Watanabe:
Development of a Radiation-Hardened JTAG Interface for Optically Reconfigurable Gate Arrays. ICCE 2025: 1-5
[c19]
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Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe:
Demonstration of a Clock Distribution Method using Switching Matrices and a Two-Phase Clock Signal on an FPGA. ICCE 2025: 1-4
[c18]
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  - conf/iccel/OhashiWW25
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Seiji Ohashi, Minoru Watanabe, Nobuya Watanabe:
Radiation Degradation Evaluation of the Dynamic Configuration Circuit on An Optically Reconfigurable Gate Array VLSI. ICCE 2025: 1-3
[c17]
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Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe:
Radiation-Hardened Triple Modular Redundant Serial Communication System Using Triple Communication Lines. ICCE 2025: 1-4
[c16]
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  - conf/iccel/TakataWW25
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Atsushi Takata, Minoru Watanabe, Nobuya Watanabe:
Realization of Wafer-Scale VLSI Using Optical Configuration Architecture. ICCE 2025: 1-4
[c15]
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Nobuya Watanabe, Minoru Watanabe:
Triple Modular Redundancy Logic Design from High-Level Hardware Description. ICCE 2025: 1-6
2024
[c14]
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  - conf/aina/SeoKWLT24
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Yukito Seo, Rafly Arief Kanza, Nobuya Watanabe, Kin Fun Li, Kosuke Takano:
A Classification Method of Image Feature Using Neural Metric Learning for Natural Environment Video. AINA (6) 2024: 414-421
[c13]
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  - conf/asap/ShimamuraWW24
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Yuki Shimamura, Minoru Watanabe, Nobuya Watanabe:
Voltage Range Evaluation of An Optically Reconfigurable Gate Array VLSI. ASAP 2024: 239-240
[c12]
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  - conf/iccel/GotoWOW24
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Sae Goto, Minoru Watanabe, Akifumi Ogiwara, Nobuya Watanabe:
Parallel configuration experiment for a radiation-hardened optically reconfigurable gate array with a holographic polymer-dispersed liquid crystal memory. ICCE 2024: 1-2
[c11]
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  - conf/iccel/SekiokaWW24
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Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe:
Remote monitoring system for optically reconfigurable gate arrays in radiation environments. ICCE 2024: 1-2
[c10]
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  - conf/iccel/TakataWW24
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Atsushi Takata, Minoru Watanabe, Nobuya Watanabe:
Wafer-scale VLSI realization using programmable architecture. ICCE 2024: 1-2
[c9]
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  - conf/iccel/WatanabeIW24
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Nobuya Watanabe, Ryoya Ishitani, Minoru Watanabe:
Application design system for high-speed dynamically reconfigurable gate arrays. ICCE 2024: 1-6
[c8]
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  - conf/socc/TakatsukiWW24
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Shintaro Takatsuki, Minoru Watanabe, Nobuya Watanabe:
Ring oscillator based clock generation for a radiation-hardened optically reconfigurable gate array VLSI. SOCC 2024: 1-6
2023
[c7]
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  - conf/aina/MimuraTTWL23
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Hiroki Mimura, Masaya Tahara, Kosuke Takano, Nobuya Watanabe, Kin Fun Li:
Video Indexing for Live Nature Camera on Digital Earth. AINA (3) 2023: 660-667
[c6]
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  - conf/iccel/BambaWW23
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Daisuke Bamba, Minoru Watanabe, Nobuya Watanabe:
Total-Ionizing-Dose Tolerance Analysis of a Radiation-Hardened Image Sensor. ICCE 2023: 1-2
[c5]
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  - conf/newcas/AndoWW23
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Kakeru Ando, Minoru Watanabe, Nobuya Watanabe:
Multi-context-scrubbing operation for a 1-bit counter circuit. NEWCAS 2023: 1-4
[c4]
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  - conf/socc/TsujinoWW23
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Masashi Tsujino, Minoru Watanabe, Nobuya Watanabe:
An optically reconfigurable gate array VLSI driven by an unstabilized power supply unit. SOCC 2023: 1-5
2022
[c3]
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  - conf/apccas/GotoWW22
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Sae Goto, Minoru Watanabe, Nobuya Watanabe:
Optically Reconfigurable Gate Array VLSI That Can Support a Perfect Parallel Configuration. APCCAS 2022: 241-245
[c2]
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  - conf/ccwc/UshiroyamaWWN22
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Akihiko Ushiroyama, Minoru Watanabe, Nobuya Watanabe, Akira Nagoya:
Convolutional neural network implementations using Vitis AI. CCWC 2022: 365-371
[c1]
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  - conf/icecsys/YamadaOWW22
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Kaho Yamada, Takeshi Okazaki, Minoru Watanabe, Nobuya Watanabe:
Total Dose Tolerance Analysis of an Optically Reconfigurable Gate Array VLSI. ICECS 2022 2022: 1-4

2000 – 2009

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2004
[j1]
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  - journals/tie/MatsuoLKSW04
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Hirofumi Matsuo, Wenzhong Lin, Fujio Kurokawa, Tetsuro Shigemizu, Nobuya Watanabe:
Characteristics of the multiple-input DC-DC converter. IEEE Trans. Ind. Electron. 51(3): 625-631 (2004)

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