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Jui-Chung Chang
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2010 – 2019
- 2019
- [j1]Tang-Huang Lin, Jui-Chung Chang, Kuo-Hsien Hsu, Yun-Shan Lee, Sheng-Kai Zeng, Gin-Rong Liu, Fuan Tsai, Hai-Po Chan:
Radiometric Variations of On-Orbit FORMOSAT-5 RSI from Vicarious and Cross-Calibration Measurements. Remote. Sens. 11(22): 2634 (2019) - 2015
- [c7]Chih-Wei Feng, Jui-Chung Chang, Wei-Chen Chen, Wai-Chi Fang:
A reliable brain computer interface implemented on FPGA for mobile dialing system. ICCE-TW 2015: 110-111 - 2014
- [c6]Wai-Chi Fang, Jui-Chung Chang, Kuan-Ju Huang, Chih-Wei Feng, Chia-Ching Chou:
An efficient VLSI implementation of SVD processor of on-line recursive ICA for real-time EEG system. BioCAS 2014: 73-76 - [c5]Wai-Chi Fang, Kuan-Ju Huang, Chia-Ching Chou, Jui-Chung Chang, Gert Cauwenberghs, Tzyy-Ping Jung:
An efficient ASIC implementation of 16-channel on-line recursive ICA processor for real-time EEG system. EMBC 2014: 3849-3852 - [c4]Chih-Wei Feng, Ting-Kuei Hu, Jui-Chung Chang, Wai-Chi Fang:
A reliable brain computer interface implemented on an FPGA for a mobile dialing system. ISCAS 2014: 654-657 - 2013
- [c3]Kuan-Ju Huang, Wei-Yeh Shih, Jui-Chung Chang, Chih-Wei Feng, Wai-Chi Fang:
A pipeline VLSI design of fast singular value decomposition processor for real-time EEG system based on on-line recursive independent component analysis. EMBC 2013: 1944-1947 - [c2]Kuan-Ju Huang, Jui-Chung Chang, Chih-Wei Feng, Wai-Chi Fang:
A parallel VLSI architecture of singular value decomposition processor for real-time multi-channel EEG system. ISCE 2013: 21-22 - [c1]Kuan-Ju Huang, Jui-Chieh Liao, Wei-Yeh Shih, Chih-Wei Feng, Jui-Chung Chang, Chia-Ching Chou, Wai-Chi Fang:
A real-time processing flow for ICA based EEG acquisition system with eye blink artifact elimination. SiPS 2013: 237-240
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