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Nyunyi M. Tshibangu

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2010 – 2019

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2013
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Nyunyi M. Tshibangu, Paul D. Franzon, Eric Rotenberg, William Rhett Davis:
Design of controller for L2 cache mapped in Tezzaron stacked DRAM. 3DIC 2013: 1-4
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Eric Rotenberg, Brandon H. Dwiel, Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Rangeen Basu Roy Chowdhury, Nyunyi M. Tshibangu, Steve Lipa, W. Rhett Davis, Paul D. Franzon:
Rationale for a 3D heterogeneous multi-core processor. ICCD 2013: 154-168

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