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ORCIDYuki Fukazawa
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2010 – 2019
- 2018
[j1]BaoKang Wang
, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki:
Tile/line access cache memory based on a multi-level Z-order tiling data layout. Concurr. Comput. Pract. Exp. 30(9) (2018)- 2016
- [c8]BaoKang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki:
A cache memory with unit tile and line accessibility. ICIS 2016: 1-6 - [c7]Kouki Kayamuro, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo:
A Rapid Verification Framework for Developing Multi-core Processor. CANDAR 2016: 388-394 - [c6]Yuki Fukazawa, Keita Watanabe, Yuki Minoura, Toshio Kondo, Takahiro Sasaki:
SIMD-based datapath with efficient operation structure for motion estimation. ICASSP 2016: 1031-1035 - [c5]BaoKang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki:
A cache memory with unit tile and line accessibility. HPCS 2016: 866-874 - 2015
- [c4]Yuki Fukazawa, Hideyuki Ichihara, Tomoo Inoue:
A fault tolerant response analyzer with self-error-correction capability. ETS 2015: 1-2 - [c3]Hiroaki Kawashima, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo:
Register Port Prediction for a Banked Register File. CANDAR 2015: 551-555 - [c2]Seiji Miyoshi, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo:
An Architectural Framework of Snoopy Interconnection for Heterogeneous Cache Systems. CANDAR 2015: 561-565 - 2013
- [c1]Yuki Fukazawa, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue:
A Transient Fault Tolerant Test Pattern Generator for On-line Built-in Self-Test. Asian Test Symposium 2013: 85-90
Coauthor Index
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