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Masab Ahmad
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2020 – today
- 2022
- [j6]Akif Rehman
, Masab Ahmad, Omer Khan:
A performance predictor for implementation selection of parallelized static and temporal graph algorithms. Concurr. Comput. Pract. Exp. 34(2) (2022) - 2020
- [j5]Masab Ahmad, Halit Dogan, José A. Joao, Omer Khan:
In-Hardware Moving Compute to Data Model to Accelerate Thread Synchronization on Large Multicores. IEEE Micro 40(1): 83-92 (2020) - [c14]Masab Ahmad, Mohsin Shan, Akif Rehman, Omer Khan:
Accelerating relax-ordered task-parallel workloads using multi-level dependency checking. ICS 2020: 36:1-36:11 - [c13]Akif Rehman, Masab Ahmad, Omer Khan:
Exploring accelerator and parallel graph algorithmic choices for temporal graphs. PMAM@PPoPP 2020: 7:1-7:10
2010 – 2019
- 2019
- [j4]Halit Dogan, Masab Ahmad, Brian Kahne, Omer Khan:
Accelerating Synchronization Using Moving Compute to Data Model at 1, 000-core Multicore Scale. ACM Trans. Archit. Code Optim. 16(1): 4:1-4:27 (2019) - [j3]Syed Kamran Haider
, Chenglu Jin
, Masab Ahmad
, Devu Manikantan Shila
, Omer Khan
, Marten van Dijk
:
Advancing the State-of-the-Art in Hardware Trojans Detection. IEEE Trans. Dependable Secur. Comput. 16(1): 18-32 (2019) - [c12]Masab Ahmad, Mohsin Shan, Akif Rehman, Omer Khan:
POSTER: Exploiting Multi-Level Task Dependencies to Prune Redundant Work in Relax-Ordered Task-Parallel Algorithms. PACT 2019: 495-496 - [c11]Masab Ahmad, Halit Dogan, Christopher J. Michael, Omer Khan:
HeteroMap: A Runtime Performance Predictor for Efficient Processing of Graph Analytics on Heterogeneous Multi-Accelerators. ISPASS 2019: 268-281 - 2018
- [j2]Hamza Omar, Qingchuan Shi, Masab Ahmad, Halit Dogan, Omer Khan:
Declarative Resilience: A Holistic Soft-Error Resilient Multicore Architecture that Trades off Program Accuracy for Efficiency. ACM Trans. Embed. Comput. Syst. 17(4): 76:1-76:27 (2018) - [c10]Halit Dogan, Masab Ahmad, José A. Joao, Omer Khan:
Accelerating Synchronization in Graph Analytics Using Moving Compute to Data Model on Tilera TILE-Gx72. ICCD 2018: 496-505 - [c9]Masab Ahmad, Halit Dogan, Fabio Checconi, Xinyu Que, Daniele Buono, Omer Khan:
Software-Hardware Managed Last-level Cache Allocation Scheme for Large-Scale NVRAM-Based Multicores Executing Parallel Data Analytics Applications. IPDPS 2018: 316-325 - 2017
- [j1]Masab Ahmad, Christopher J. Michael, Omer Khan:
Efficient Situational Scheduling of Graph Workloads on Single-Chip Multicores and GPUs. IEEE Micro 37(1): 30-40 (2017) - [c8]Hamza Omar, Masab Ahmad, Omer Khan:
GraphTuner: An Input Dependence Aware Loop Perforation Scheme for Efficient Execution of Approximated Graph Algorithms. ICCD 2017: 201-208 - [c7]Halit Dogan, Farrukh Hijaz, Masab Ahmad, Brian Kahne, Peter Wilson, Omer Khan:
Accelerating Graph and Machine Learning Workloads Using a Shared Memory Multicore Architecture with Auxiliary Support for In-hardware Explicit Messaging. IPDPS 2017: 254-264 - 2016
- [c6]Masab Ahmad, Omer Khan:
GPU concurrency choices in graph analytics. IISWC 2016: 178-187 - 2015
- [c5]Masab Ahmad, Kartik Lakshminarasimhan, Omer Khan:
Efficient parallelization of path planning workload on single-chip shared-memory multicores. HPEC 2015: 1-6 - [c4]Syed Kamran Haider, Masab Ahmad, Farrukh Hijaz, Astha Patni, Ethan Johnson, Matthew Seita, Omer Khan, Marten van Dijk
:
M-MAP: Multi-factor memory authentication for secure embedded processors. ICCD 2015: 471-474 - [c3]Masab Ahmad, Farrukh Hijaz, Qingchuan Shi, Omer Khan:
CRONO: A Benchmark Suite for Multithreaded Graph Algorithms Executing on Futuristic Multicores. IISWC 2015: 44-55 - [c2]Masab Ahmad, Syed Kamran Haider, Farrukh Hijaz, Marten van Dijk
, Omer Khan:
Exploring the performance implications of memory safety primitives in many-core processors executing multi-threaded workloads. HASP@ISCA 2015: 6:1-6:8 - [i2]Syed Kamran Haider, Masab Ahmad, Farrukh Hijaz, Astha Patni, Ethan Johnson, Matthew Seita, Omer Khan, Marten van Dijk:
M-MAP: Multi-Factor Memory Authentication for Secure Embedded Processors. IACR Cryptol. ePrint Arch. 2015: 831 (2015) - 2014
- [c1]Masab Ahmad, Awais Mehmood Kamboh
, Rehan Hafiz
:
Power & throughput optimized lifting architecture for Wavelet Packet Transform. ISCAS 2014: 2205-2208 - [i1]Syed Kamran Haider, Chenglu Jin, Masab Ahmad, Devu Manikantan Shila, Omer Khan, Marten van Dijk:
HaTCh: Hardware Trojan Catcher. IACR Cryptol. ePrint Arch. 2014: 943 (2014)
Coauthor Index
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