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2010 – 2019
- 2018
[j4]Tsuyoshi Ebuchi, Taku Toshikawa, Seiji Watanabe, Yutaka Terada, Toru Iwata:
An ultra-wide range (0.01-240 Gbps) transmitter with latched AC-coupled driver and dummy data transient generator. IEICE Electron. Express 15(3): 20171151 (2018)- 2014
- [j3]Tsuyoshi Ebuchi, Taku Toshikawa, Seiji Watanabe, Tomohiro Tsuchiya, Yutaka Terada, Tomoko Chiba, Keijiro Umehara, Toru Iwata, Takefumi Yoshikawa:
A jitter suppression technique against data pattern dependency on high-speed interfaces for highly integrated SoCs. IEICE Electron. Express 11(22): 20140949 (2014) - [j2]Yohei Nakata, Yuta Kimi, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa, Makoto Nagata
, Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm Resilient Cache Memory for Dynamic Variation Tolerance Delivering ×91 Failure Rate Improvement under 35% Supply Voltage Fluctuation. IEICE Trans. Electron. 97-C(4): 332-341 (2014) - [c1]Yohei Nakata, Yuta Kimi, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa, Makoto Nagata, Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement. ISQED 2014: 16-23 - 2012
- [j1]Takuya Sawada, Taku Toshikawa, Kumpei Yoshikawa, Hidehiro Takata, Koji Nii, Makoto Nagata:
Evaluation of SRAM-Core Susceptibility against Power Supply Voltage Variation. IEICE Trans. Electron. 95-C(4): 586-593 (2012)
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