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Pingakshya Goswami
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2020 – today
- 2023
- [j2]Pingakshya Goswami
, Dinesh Bhatia
:
Application of Machine Learning in FPGA EDA Tool Development. IEEE Access 11: 109564-109580 (2023) - [j1]Pingakshya Goswami
, Benjamin Carrión Schäfer, Dinesh Bhatia
:
Machine learning based fast and accurate High Level Synthesis design space exploration: From graph to synthesis. Integr. 88: 116-124 (2023) - 2022
- [c5]Pingakshya Goswami, Dinesh Bhatia
:
Predicting Post-Route Quality of Results Estimates for HLS Designs using Machine Learning. ISQED 2022: 45-50 - [c4]Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia
:
MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design Flows. LASCAS 2022: 1-4 - [c3]Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia
:
Robust Estimation of FPGA Resources and Performance from CNN Models. VLSID 2022: 144-149 - [i2]Pingakshya Goswami, Dinesh Bhatia
:
Predicting Post-Route Quality of Results Estimates for HLS Designs using Machine Learning. CoRR abs/2205.12397 (2022) - 2020
- [c2]Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia:
MLSBench: A Synthesizable Dataset of HLS Designs to Support ML Based Design Flows. FPGA 2020: 312 - [i1]Pingakshya Goswami, Dinesh Bhatia:
Automated Floorplanning for Partially Reconfigurable Designs on Heterogenrous FPGAs. CoRR abs/2011.11716 (2020)
2010 – 2019
- 2016
- [c1]Pingakshya Goswami, Dinesh Bhatia:
Floorplanning of Partially Reconfigurable Design on Heterogeneous FPGA (Abstract Only). FPGA 2016: 275
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