default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDJoon-Sung Yang
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j36]Thai-Hoang Nguyen
, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang:
HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators. IEEE Trans. Computers 73(9): 2123-2135 (2024)- [c47]Jae-Youn Hong, Sungkyu Kim, Je-Woo Jang, Joon-Sung Yang:
LOCo: LPDDR Optimization with Compression and IECC scheme for DNN Inference. ISLPED 2024: 1-6 - 2023
- [j35]Khanh-Binh Nguyen, Jaehyuk Choi, Joon-Sung Yang:
EUNNet: Efficient UN-Normalized Convolution Layer for Stable Training of Deep Residual Networks Without Batch Normalization Layer. IEEE Access 11: 76977-76988 (2023) - [j34]Hongju Kal, Hyoseong Choi, Ipoom Jeong, Joon-Sung Yang, Won Woo Ro:
A convertible neural processor supporting adaptive quantization for real-time neural networks. J. Syst. Archit. 145: 103025 (2023) - [j33]Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang:
CRAFT: Criticality-Aware Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3289-3300 (2023) - [c46]Insu Choi, Jae-Youn Hong, JaeHwa Jeon, Joon-Sung Yang:
RQ-DNN: Reliable Quantization for Fault-tolerant Deep Neural Networks. DAC 2023: 1-2 - [c45]JaeHwa Jeon, Jae-Youn Hong, Sunghoon Kim, Insu Choi, Joon-Sung Yang:
PIE-DRAM: Postponing IECC to Enhance DRAM performance with access table. DAC 2023: 1-2 - [c44]Je-Woo Jang, Thai-Hoang Nguyen, Joon-Sung Yang:
VECOM: Variation-Resilient Encoding and Offset Compensation Schemes for Reliable ReRAM-Based DNN Accelerator. ICCAD 2023: 1-9 - [c43]Khanh-Binh Nguyen, Joon-Sung Yang:
Boosting Semi-Supervised Learning by bridging high and low-confidence predictions. ICCV (Workshops) 2023: 1020-1030 - [c42]Youngkyoon Jang, Jiali Zheng, Jifei Song, Helisa Dhamo, Eduardo Pérez-Pellitero, Thomas Tanay, Matteo Maggioni, Richard Shaw, Sibi Catley-Chandar, Yiren Zhou, Jiankang Deng, Ruijie Zhu, Jiahao Chang, Ziyang Song, Jiahuan Yu, Tianzhu Zhang, Khanh-Binh Nguyen, Joon-Sung Yang, Andreea Dogaru, Bernhard Egger, Heng Yu, Aarush Gupta, Joel Julin, László A. Jeni, Hyeseong Kim, Jungbin Cho, Dosik Hwang, Deukhee Lee, Doyeon Kim, Dongseong Seo, SeungJin Jeon, YoungDon Choi, Jun Seok Kang, Ahmet Cagatay Seker, Sang Chul Ahn, Ales Leonardis, Stefanos Zafeiriou:
VSCHH 2023: A Benchmark for the View Synthesis Challenge of Human Heads. ICCV (Workshops) 2023: 1113-1120 - [i3]Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang:
CRAFT: Criticality-Aware Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks. CoRR abs/2302.03862 (2023) - [i2]Khanh-Binh Nguyen, Joon-Sung Yang:
Boosting Semi-Supervised Learning by bridging high and low-confidence predictions. CoRR abs/2308.07509 (2023) - [i1]Je-Woo Jang, Thai-Hoang Nguyen, Joon-Sung Yang:
VECOM: Variation Resilient Encoding and Offset Compensation Schemes for Reliable ReRAM Based DNN Accelerator. CoRR abs/2312.11042 (2023) - 2022
- [j32]Khanh-Binh Nguyen, Jaehyuk Choi, Joon-Sung Yang:
Checkerboard Dropout: A Structured Dropout With Checkerboard Pattern for Convolutional Neural Networks. IEEE Access 10: 76044-76054 (2022) - [j31]Muhammad Imran, Taehyun Kwon, Nur A. Touba, Joon-Sung Yang:
CEnT: An Efficient Architecture to Eliminate Intra-Array Write Disturbance in PCM. IEEE Trans. Computers 71(5): 992-1007 (2022) - [j30]Muhammad Imran, Taehyun Kwon, Joon-Sung Yang:
ADAPT: A Write Disturbance-Aware Programming Technique for Scaled Phase Change Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 950-963 (2022) - [c41]Suyong Lee, Insu Choi, Joon-Sung Yang:
Bipolar vector classifier for fault-tolerant deep neural networks. DAC 2022: 673-678 - [c40]Seo-Seok Lee, Joon-Sung Yang:
Value-aware Parity Insertion ECC for Fault-tolerant Deep Neural Network. DATE 2022: 724-729 - [c39]Thai-Hoang Nguyen, Muhammad Imran, Joon-Sung Yang:
DynaPAT: A Dynamic Pattern-Aware Encoding Technique for Robust MLC PCM-Based Deep Neural Networks. ICCAD 2022: 138:1-138:9 - 2021
- [j29]Taehyun Kwon, Muhammad Imran, Joon-Sung Yang:
Reliability Enhanced Heterogeneous Phase Change Memory Architecture for Performance and Energy Efficiency. IEEE Trans. Computers 70(9): 1388-1400 (2021) - [c38]Thai-Hoang Nguyen, Muhammad Imran, Jaehyuk Choi, Joon-Sung Yang:
Low-Cost and Effective Fault-Tolerance Enhancement Techniques for Emerging Memories-Based Deep Neural Networks. DAC 2021: 1075-1080 - 2020
- [j28]Muhammad Imran, Hyunseung Han, Jooho Kim, Taehyun Kwon, Jaeyong Chung, Joon-Sung Yang:
Virtualization-Based Efficient TSV Repair for 3-D Integrated Circuits. IEEE Access 8: 42231-42242 (2020) - [j27]Taehyun Kwon, Muhammad Imran, Joon-Sung Yang:
Cost-Effective Reliable MLC PCM Architecture Using Virtual Data Based Error Correction. IEEE Access 8: 44006-44018 (2020) - [j26]Taehyun Kwon, Muhammad Imran, Joon-Sung Yang:
Pattern-Aware Encoding for MLC PCM Storage Density, Energy Efficiency, and Performance Enhancement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9): 1855-1865 (2020) - [j25]Inayat Ullah, Joon-Sung Yang, Jaeyong Chung:
ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 28(4): 1084-1088 (2020) - [j24]Taehyun Kwon, Muhammad Imran, David Z. Pan, Joon-Sung Yang:
Virtual-Tile-Based Flip-Flop Alignment Methodology for Clock Network Power Optimization. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1256-1268 (2020) - [c37]Sangmok Jeong, SeungYup Kang, Joon-Sung Yang:
PAIR: Pin-aligned In-DRAM ECC architecture using expandability of Reed-Solomon code. DAC 2020: 1-6 - [c36]Inayat Ullah, Kashif Inayat, Joon-Sung Yang, Jaeyong Chung:
Factored Radix-8 Systolic Array for Tensor Processing. DAC 2020: 1-6 - [c35]Jeong-Hyeon Kim, Ho-Jun Jo, Kyung-Kuk Jo, Sung-Hee Cho, Jaeyong Chung, Joon-Sung Yang:
Reliable and Lightweight PUF-based Key Generation using Various Index Voting Architecture. DATE 2020: 352-357 - [c34]Muhammad Imran, Taehyun Kwon, Joon-Sung Yang:
Effective Write Disturbance Mitigation Encoding Scheme for High-density PCM. DATE 2020: 1490-1495
2010 – 2019
- 2019
- [j23]Jaeyong Chung, Taehwan Shin, Joon-Sung Yang:
Simplifying Deep Neural Networks for FPGA-Like Neuromorphic Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 2032-2042 (2019) - [j22]Yongshin Kang, Joon-Sung Yang, Jaeyong Chung:
Weight Partitioning for Dynamic Fixed-Point Neuromorphic Computing Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 2167-2171 (2019) - [c33]Young-Min Lee, Joon-Sung Yang:
Computation Offloading of Acoustic Model for Client-Edge-Based Speech-Recognition. CASES (work in progress) 2019: 1-2 - [c32]Jung Min You, Joon-Sung Yang:
MRLoc: Mitigating Row-hammering based on memory Locality. DAC 2019: 19 - [c31]Jae-San Kim, Joon-Sung Yang:
DRIS-3: Deep Neural Network Reliability Improvement Scheme in 3D Die-Stacked Memory based on Fault Analysis. DAC 2019: 129 - [c30]Muhammad Imran, Taehyun Kwon, Jung Min You, Joon-Sung Yang:
Flipcy: Efficient Pattern Redistribution for Enhancing MLC PCM Reliability and Storage Density. ICCAD 2019: 1-7 - 2018
- [j21]Byung-Su Kim, Tae Hee Han, Joon-Sung Yang, Jaeyong Chung:
New library development method by FSM based cell pattern extraction. IEICE Electron. Express 15(9): 20171226 (2018) - [j20]Sae-Eun Kim, Jaeyong Chung, Joon-Sung Yang:
Mitigating Observability Loss of Toggle-Based X-Masking via Scan Chain Partitioning. IEEE Trans. Computers 67(8): 1184-1192 (2018) - [j19]Hyunseung Han, Jaeyong Chung, Joon-Sung Yang:
READ: Reliability Enhancement in 3D-Memory Exploiting Asymmetric SER Distribution. IEEE Trans. Computers 67(8): 1193-1201 (2018) - [j18]Taehee Lee, David Z. Pan, Joon-Sung Yang:
Clock Network Optimization With Multibit Flip-Flop Generation Considering Multicorner Multimode Timing Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 245-256 (2018) - [c29]Byung-Su Kim, Joon-Sung Yang:
System level performance analysis and optimization for the adaptive clocking based multi-core processor. ASP-DAC 2018: 458-463 - [c28]Seonbong Kim, Joon-Sung Yang:
Optimized I/O determinism for emerging NVM-based NVMe SSD in an enterprise system. DAC 2018: 56:1-56:6 - [c27]Hyunsu Chae, Joon-Sung Yang:
Test cost reduction for X-value elimination by scan slice correlation analysis. DAC 2018: 78:1-78:6 - [c26]Byung-Su Kim, Joon-Sung Yang:
Bayesian theory based switching probability calculation method of critical timing path for on-chip timing slack monitoring. DATE 2018: 361-366 - [c25]Taehyun Kwon, Muhammad Imran, Jung Min You, Joon-Sung Yang:
Heterogeneous PCM array architecture for reliability, performance and lifetime enhancement. DATE 2018: 1610-1615 - 2017
- [j17]Taehee Lee, Joon-Sung Yang:
Physical-aware gating element insertion for thermal-safe scan shift operation. IEICE Electron. Express 14(7): 20161181 (2017) - [j16]Taehee Lee, Nur A. Touba, Joon-Sung Yang:
Enhancing Test Compression With Dependency Analysis for Multiple Expansion Ratios. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1571-1579 (2017) - [j15]Hyunseung Han, Nur A. Touba, Joon-Sung Yang:
Exploiting Unused Spare Columns and Replaced Columns to Enhance Memory ECC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1580-1591 (2017) - [j14]Chang-Hyun Oh, Sae-Eun Kim, Joon-Sung Yang:
BIRA With Optimal Repair Rate Using Fault-Free Memory Region for Area Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(12): 3160-3171 (2017) - [c24]Seonbong Kim, Joon-Sung Yang:
Improving NVMe SSD I/O determinism with PCIe virtual channel: work-in-progress. CASES 2017: 19:1-19:2 - [c23]Seung-Yeob Lee, Joon-Sung Yang:
MVP ECC : Manufacturing process variation aware unequal protection ECC for memory reliability. DATE 2017: 846-851 - [c22]So-Yeon Park, Sunil Lim, Dahee Jeong, Jungjin Lee, Joon-Sung Yang, HyungJune Lee:
PUFSec: Device fingerprint-based security architecture for Internet of Things. INFOCOM 2017: 1-9 - [c21]Byung-Su Kim, Hyo-Sig Won, Tae Hee Han, Joon-Sung Yang:
Non-linear library characterization method for FinFET logic cells by L1-minimization. ISCAS 2017: 1-4 - 2016
- [j13]Ik Joon Chang, Joon-Sung Yang:
Subthreshold 8T SRAM sizing utilizing short-channel Vt roll-off and inverse narrow-width effect. IEICE Electron. Express 13(8): 20160020 (2016) - [j12]Taehee Lee, YongJoon Kim, Joon-Sung Yang:
Temperature and voltage droop-aware test scheduling during scan shift operation. IEICE Electron. Express 13(18): 20160581 (2016) - [j11]Joon-Sung Yang, Jinsuk Chung, Nur A. Touba:
Enhancing Superset X-Canceling Method With Relaxed Constraints on Fault Observation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 298-308 (2016) - [c20]Chang-Hyun Oh, Sae-Eun Kim, Joon-Sung Yang:
A BIRA using fault-free memory region for area reduction. APCCAS 2016: 480-482 - [c19]Jung-Jin Lee, Joon-Sung Yang:
System-level failure simulation and memory allocation scheme in 3D memory. APCCAS 2016: 674-675 - [c18]Jin-Hyun Kang, Nur A. Touba, Joon-Sung Yang:
Reducing control bit overhead for X-masking/X-canceling hybrid architecture via pattern partitioning. DAC 2016: 59:1-59:6 - [c17]Byung-Su Kim, Hyo-Sig Won, Tae Hee Han, Joon-Sung Yang:
AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments. ISCAS 2016: 662-665 - [c16]Taehee Lee, JongWon Yi, Joon-Sung Yang:
Multi-bit flip-flop generation considering multi-corner multi-mode timing constraint. ISCAS 2016: 782-785 - [c15]Seung-Yeob Lee, Joon-Sung Yang:
eFuse based IC authentication architecture. ISOCC 2016: 145-146 - [c14]Jong Hyuk Park, Joon-Sung Yang:
Memory ECC architecutre utilizing memory column spares. ISOCC 2016: 359-360 - 2015
- [c13]Hyunseung Han, Joon-Sung Yang:
Asymmetric ECC organization in 3D-memory via spare column utilization. DFTS 2015: 13-16 - [c12]Byung-Jun Jang, Chan-Ho Lee, Sung-Hun Sim, Kyu-Won Choi, Do-Hun Byun, Yeon-Ho Jung, Ki-Man Park, Dong-Yeon Heo, Gyu-Hong Kim, Joon-Sung Yang:
Robust via-programmable ROM design based on 45nm process considering process variation and enhancement Vmin and yield. ISCAS 2015: 2541-2544 - [c11]Seongyeol Oh, Joon-Sung Yang, Andrea Bianchi, Hyoungshick Kim:
Devil in a box: Installing backdoors in electronic door locks. PST 2015: 139-144 - 2014
- [j10]Junghwa Kim, Jun-Ho Huh, Soo-Yong Kim, Suk Won Kim, Joon-Sung Yang:
Low-power shared memory architecture power mode for mobile system-on-chip. IEICE Electron. Express 11(8) (2014) - [j9]Chang Lin Li, Jae Hoon Lee, Joon-Sung Yang, Tae Hee Han:
Communication-aware custom topology generation for VFI network-on-chip. IEICE Electron. Express 11(18): 20140716 (2014) - [j8]Joon-Sung Yang, Jinkyu Lee, Nur A. Touba:
Utilizing ATE Vector Repeat With Linear Decompressor for Test Vector Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1219-1230 (2014) - [j7]Jaeyong Chung, Yonghyun Kim, Joon-Sung Yang:
3-D Probe: Low-Cost Variation Modeling Using Intertest-Item Correlations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 2005-2009 (2014) - 2013
- [j6]Joon-Sung Yang, Ik Joon Chang:
Robust Buffered Clock Tree Synthesis by Sensitivity Based Link Insertion. IEICE Trans. Electron. 96-C(1): 127-131 (2013) - [j5]Joon-Sung Yang, Nur A. Touba:
Improved Trace Buffer Observation via Selective Data Capture Using 2-D Compaction for Post-Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. 21(2): 320-328 (2013) - [c10]Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham:
Dynamic Trace Signal Selection for Post-Silicon Validation. VLSI Design 2013: 302-307 - [c9]Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham:
Enhanced algorithm of combining trace and scan signals in post-silicon validation. VTS 2013: 1-6 - 2012
- [j4]Ik Joon Chang, Joon-Sung Yang:
Bit-error rate improvement of TLC NAND Flash using state re-ordering. IEICE Electron. Express 9(23): 1775-1779 (2012) - [j3]Joon-Sung Yang, Nur A. Touba, Benoit Nadeau-Dostie:
Test Point Insertion with Control Points Driven by Existing Functional Flip-Flops. IEEE Trans. Computers 61(10): 1473-1483 (2012) - [j2]Joon-Sung Yang, Nur A. Touba:
Efficient Trace Signal Selection for Silicon Debug by Error Transmission Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(3): 442-446 (2012) - [j1]Joon-Sung Yang, Nur A. Touba:
X-Canceling MISR Architectures for Output Response Compaction With Unknown Values. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(9): 1417-1427 (2012) - 2011
- [c8]Joon-Sung Yang, Rudrajit Datta:
Efficient Function Mapping in Nanoscale Crossbar Architecture. DFT 2011: 190-196
2000 – 2009
- 2009
- [c7]Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba:
Reducing Test Point Area for BIST through Greater Use of Functional Flip-Flops to Drive Control Points. DFT 2009: 20-28 - [c6]Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba:
Test point insertion using functional flip-flops to drive control points. ITC 2009: 1-10 - [c5]Joon-Sung Yang, Nur A. Touba, Shih-Yu Yang, T. M. Mak:
An industrial case study for X-canceling MISR. ITC 2009: 1-10 - [c4]Joon-Sung Yang, Nur A. Touba:
Automated Selection of Signals to Observe for Efficient Silicon Debug. VTS 2009: 79-84 - 2008
- [c3]Joon-Sung Yang, Nur A. Touba:
Enhancing Silicon Debug via Periodic Monitoring. DFT 2008: 125-133 - [c2]Joon-Sung Yang, Nur A. Touba:
Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture. VTS 2008: 345-351 - 2007
- [c1]Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Chen, David Z. Pan:
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis. ISQED 2007: 398-403
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-23 20:34 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
