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Md. Badruddoja Majumder
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2020 – today
- 2021
- [j6]Aysha S. Shanta, Md. Badruddoja Majumder, Md Sakib Hasan, Garrett S. Rose:
Physically Unclonable and Reconfigurable Computing System (PURCS) for Hardware Security Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(3): 405-418 (2021) - [i2]Md Sakib Hasan, Aysha S. Shanta, Partha Sarathi Paul, Maisha Sadia, Md. Badruddoja Majumder, Garrett S. Rose:
Design of an Enhanced Reconfigurable Chaotic Oscillator using G4FET-NDR Based Discrete Map. CoRR abs/2101.00334 (2021) - 2020
- [j5]Md Sakib Hasan, Md. Badruddoja Majumder, Aysha S. Shanta, Mesbah Uddin, Garrett S. Rose:
A Chaos-Based Complex Micro-instruction Set for Mitigating Instruction Reverse Engineering. J. Hardw. Syst. Secur. 4(2): 69-85 (2020) - [i1]Mesbah Uddin, Md. Badruddoja Majumder, Md Sakib Hasan, Garrett S. Rose:
A Secure Back-up and Restore for Resource-Constrained IoT based on Nanotechnology. CoRR abs/2007.04570 (2020)
2010 – 2019
- 2019
- [j4]Md. Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin, Garrett S. Rose:
A Secure Integrity Checking System for Nanoelectronic Resistive RAM. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 416-429 (2019) - [c9]Md. Badruddoja Majumder, Md Sakib Hasan, Aysha S. Shanta, Mesbah Uddin, Garrett S. Rose:
Design for Eliminating Operation Specific Power Signatures from Digital Logic. ACM Great Lakes Symposium on VLSI 2019: 111-116 - [c8]Mesbah Uddin, Aysha S. Shanta, Md. Badruddoja Majumder, Md Sakib Hasan, Garrett S. Rose:
Memristor Crossbar PUF based Lightweight Hardware Security for IoT. ICCE 2019: 1-4 - [c7]Aysha S. Shanta, Md Sakib Hasan, Md. Badruddoja Majumder, Garrett S. Rose:
Design of a Lightweight Reconfigurable PRNG Using Three Transistor Chaotic Map. MWSCAS 2019: 586-589 - 2018
- [j3]Mesbah Uddin, Md. Badruddoja Majumder, Garrett S. Rose:
Nanoelectronic Security Designs for Resource-Constrained Internet of Things Devices: Finding Security Solutions with Nanoelectronic Hardwares. IEEE Consumer Electron. Mag. 7(6): 15-22 (2018) - [j2]Daniel Brown, Ava Hedayatipour, Md. Badruddoja Majumder, Garrett S. Rose, Nicole McFarlane, Donatello Materassi:
Practical realisation of a return map immune Lorenz-based chaotic stream cipher in circuitry. IET Comput. Digit. Tech. 12(6): 297-305 (2018) - [j1]Mesbah Uddin, Md. Badruddoja Majumder, Karsten Beckmann, Harika Manem, Zahiruddin Alamgir, Nathaniel C. Cady, Garrett S. Rose:
Design Considerations for Memristive Crossbar Physical Unclonable Functions. ACM J. Emerg. Technol. Comput. Syst. 14(1): 2:1-2:23 (2018) - [c6]Md. Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin, Garrett S. Rose:
Chaos computing for mitigating side channel attack. HOST 2018: 143-146 - [c5]Aysha S. Shanta, Md. Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin, Garrett S. Rose:
Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS. MWSCAS 2018: 1016-1019 - 2017
- [c4]Garrett S. Rose, Md. Badruddoja Majumder, Mesbah Uddin:
Exploiting Memristive Crossbar Memories as Dual-Use Security Primitives in IoT Devices. ISVLSI 2017: 615-620 - 2016
- [c3]Md. Badruddoja Majumder, Mesbah Uddin, Garrett S. Rose, Jeyavijayan Rajendran:
Sneak path enabled authentication for memristive crossbar memories. AsianHOST 2016: 1-6 - [c2]Garrett S. Rose, Mesbah Uddin, Md. Badruddoja Majumder:
A Designer's Rationale for Nanoelectronic Hardware Security Primitives. ISVLSI 2016: 194-199 - [c1]Mesbah Uddin, Md. Badruddoja Majumder, Garrett S. Rose, Karsten Beckmann, Harika Manem, Zahiruddin Alamgir, Nathaniel C. Cady:
Techniques for Improved Reliability in Memristive Crossbar PUF Circuits. ISVLSI 2016: 212-217
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