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ORCIDRaziyeh Salarifard
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2020 – today
- 2024
[j6]Raziyeh Salarifard, Hadi Soleimany:
An efficient hardware accelerator for NTT-based polynomial multiplication using FPGA. J. Cryptogr. Eng. 14(2): 415-426 (2024)- 2023
- [i2]Raziyeh Salarifard, Hadi Soleimany:
Efficient Accelerator for NTT-based Polynomial Multiplication. IACR Cryptol. ePrint Arch. 2023: 686 (2023) - 2022
- [j5]Muhamadali Hajisoltani, Raziyeh Salarifard, Hadi Soleimany:
Secure and Low-Area Implementation of the AES Using FPGA. ISC Int. J. Inf. Secur. 14(3): 93-99 (2022) - 2021
- [j4]Sara Zarei, Aein Rezaei Shahmirzadi
, Hadi Soleimany, Raziyeh Salarifard, Amir Moradi:
Low-Latency Keccak at any Arbitrary Order. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021(4): 388-411 (2021) - [i1]Sara Zarei, Aein Rezaei Shahmirzadi, Hadi Soleimany, Raziyeh Salarifard, Amir Moradi:
Low-Latency Keccak at any Arbitrary Order. IACR Cryptol. ePrint Arch. 2021: 892 (2021)
2010 – 2019
- 2019
- [j3]Raziyeh Salarifard, Siavash Bayat Sarmadi:
An Efficient Low-Latency Point-Multiplication Over Curve25519. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3854-3862 (2019) - 2018
- [j2]Raziyeh Salarifard, Siavash Bayat Sarmadi, Hatameh Mosanaei-Boorani:
A Low-Latency and Low-Complexity Point-Multiplication in ECC. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2869-2877 (2018) - 2016
- [j1]Raziyeh Salarifard, Siavash Bayat Sarmadi, Mohammad Farmani:
High-Throughput Low-Complexity Unified Multipliers Over GF(2m) in Dual and Triangular Bases. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 1944-1953 (2016) - 2014
- [c1]Raziyeh Salarifard, Mahshid Alsadat Hosseini, Mahmood Karimian, Shohreh Kasaei:
A robust SIFT-based descriptor for video classification. ICMV 2014: 94451E
Coauthor Index
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