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ORCIDLester de Abreu Faria
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- affiliation: Technological Institute of Aeronautics-ITA-IEEA, Electronic Engineering Division, Brazil
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2020 – today
- 2023
[c17]Diogo Wachtel, Samuel Queiroz, Torsten Schön, Werner Huber, Lester de Abreu Faria:
A novel Conditional Generative Adversarial Networks for Automotive Radar Range-Doppler Targets Synthetic Generation. ITSC 2023: 3964-3969- [c16]Mauren Louise Sguario C. Andrade, Matheus Velloso Nogueira, Eduardo Candioto Fidelis, Luiz Henrique Aguiar Campos, Pietro Lo Presti Campos, Torsten Schön
, Lester de Abreu Faria:
Exploiting GAN Capacity to Generate Synthetic Automotive Radar Data. VISIGRAPP (4: VISAPP) 2023: 262-271 - [i1]Eduardo Candioto Fidelis, Fabio Reway, Herick Y. S. Ribeiro, Pietro Lo Presti Campos, Werner Huber, Christian Icking, Lester de Abreu Faria, Torsten Schön:
Generation of Realistic Synthetic Raw Radar Data for Automated Driving Applications using Generative Adversarial Networks. CoRR abs/2308.02632 (2023) - 2022
- [p1]Roberto Silva Netto, Lester de Abreu Faria, Johannes Von Lochter, Emerson Roseiro Filho, Guilhardo Augusto de Azevedo Rodrigues:
Facens Smart Campus Integrated Dashboard: A Use Case Applied for Energy Efficiency. IoT and WSN based Smart Cities 2022: 67-88 - 2021
- [j6]Gabriel Antonio Fanelli de Souza, Rodrigo Bispo dos Santos, Lester de Abreu Faria:
A PWM Nie-Tan Type-Reducer Circuit for a Low-Power Interval Type-2 Fuzzy Controller. IEEE Access 9: 158773-158783 (2021) - 2020
- [j5]P. C. S. Euphrásio, Lester de Abreu Faria, José Silvério Edmundo Germano, Daisy Hirata:
Improving Teaching-Learning Process in MIL-STD-1553B Bus Classes Using a New Hybrid Web-Lab Methodology. IEEE Trans. Educ. 63(4): 291-298 (2020) - [c15]Felipe Hashimoto Fengler, Jener Fernando Leite de Moraes, Admilson Irio Ribeiro, Marcela Merides Carvalho, Afonso Peche Filho, Gerson Araujo de Medeiros, Roberto Silva Netto, Lester de Abreu Faria:
A framework to evaluate the environmental quality and simulate future scenarios of urban forests: atlantic forest case study. ISC2 2020: 1-8
2010 – 2019
- 2019
- [j4]Gabriel Antonio Fanelli de Souza, Rodrigo Bispo dos Santos, Lester de Abreu Faria:
Low power membership function generator for interval type-2 fuzzy system. J. Intell. Fuzzy Syst. 36(6): 6103-6112 (2019) - [j3]Gabriel Antonio Fanelli de Souza, Rodrigo Bispo dos Santos, Lester de Abreu Faria:
Low-Power Current-Mode Interval Type-2 Fuzzy Inference Engine Circuit. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2639-2650 (2019) - 2018
- [j2]Gabriel Antonio Fanelli de Souza, Rodrigo Bispo dos Santos, Paloma Maria Silva Rocha Rizol, Duarte Lopes de Oliveira, Lester de Abreu Faria:
A novel fully-programmable analog fuzzifier architecture for interval type-2 fuzzy controllers using current steering mirrors. J. Intell. Fuzzy Syst. 34(1): 203-212 (2018) - [c14]Higor A. Delsoto, Duarte Lopes de Oliveira, Lucas Moura Santana, Lester de Abreu Faria:
A design flow of asynchronous burst-mode circuits without fundamental-mode timing assumption. LASCAS 2018: 1-4 - [c13]Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lucas Moura Santana, Lester de Abreu Faria:
A novel state assignment method for XBM AFSMs without the essential hazard assumption. LASCAS 2018: 1-4 - [c12]Duarte Lopes de Oliveira, Kledermon Garcia, Lucas Moura Santana, Lester de Abreu Faria:
FPGA implementation of high-performance asynchronous pipelines with robust control. LASCAS 2018: 1-4 - [c11]Felipe Mendes, Tiago S. Curtinhas, Duarte Lopes de Oliveira, Higor A. Delsoto, Lester de Abreu Faria:
A Novel Tool for Synthesis by Direct Mapping of Asynchronous Circuits from Extended STG Specifications. VLSID 2018: 451-452 - 2017
- [j1]Felipe Tuyama De Faria Barbosa, Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lester de Abreu Faria, Jocemar Francisco De Souza Luciano:
Implementation of Locally-Clocked XBM State Machines on FPGAs Using Synchronous CAD Tools. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1064-1074 (2017) - 2016
- [c10]Duarte Lopes de Oliveira, Felipe Tuyama De Faria Barbosa, Tiago S. Curtinhas, Lester de Abreu Faria, Jocemar F. Sousa:
A design flow for locally-clocked XBM asynchronous state machines using synchronous CAD tools. LASCAS 2016: 251-254 - [c9]Kledermon Garcia, Duarte Lopes de Oliveira, Roberto d'Amore, Lester de Abreu Faria, Joao Luis V. Oliveira:
FPGA implementation of optimized XBM specifications by transformation for AFSMs. ReConFig 2016: 1-6 - [c8]Eduardo Lussari, Duarte Lopes de Oliveira, Lester de Abreu Faria, Orlando Verducci Jr.:
Software-Defined Radio design based on GALS architecture for FPGAs. SBCCI 2016: 1-6 - 2015
- [c7]Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lester de Abreu Faria, Leonardo Romano:
A novel asynchronous interface with pausible clock for partitioned synchronous modules. LASCAS 2015: 1-4 - [c6]Tiago S. Curtinhas, Tassio Cortes Cavalcante, Duarte Lopes de Oliveira, Lester de Abreu Faria, Osamu Saotome:
Minimization and Encoding of High Performance Asynchronous State Machines Based on Genetic Algorithm. SBCCI 2015: 4:1-4:6 - 2014
- [b1]Lester de Abreu Faria:
Desenvolvimento de modelos de simulação para transistores MOS a temperaturas criogênicas (77K). Instituto Tecnológico de Aeronáutica, São José dos Campos, Brazil, 2014 - [c5]Tiago S. Curtinhas, Duarte Lopes de Oliveira, Diego Bompean, Lester de Abreu Faria, Leonardo Romano:
SICARELO: A tool for synthesis of locally-clocked extended burst-mode asynchronous Controllers. LASCAS 2014: 1-4 - [c4]Tiago S. Curtinhas, Duarte Lopes de Oliveira, Lester de Abreu Faria, Osamu Saotome:
A novel State Assignment method for Extended Burst-Mode FSM design using Genetic Algorithm. SBCCI 2014: 39:1-39:7 - 2013
- [c3]Duarte Lopes de Oliveira, Diego Bompean, Tiago S. Curtinhas, Lester de Abreu Faria:
Design of locally-clocked asynchronous finite state machines using synchronous CAD tools. LASCAS 2013: 1-4 - [c2]Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lester de Abreu Faria, Leonardo Romano:
Design of synchronous pipeline digital systems operating in double-edge of the clock. LASCAS 2013: 1-4 - [c1]Duarte Lopes de Oliveira, Diego Bompean, Lester de Abreu Faria, Joao Luis V. Oliveira:
Design of asynchronous systems on FPGA using direct mapping and synchronous specification. ReConFig 2013: 1-6
Coauthor Index
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