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ORCIDSumit D. Mediratta
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2000 – 2009
- 2007
[c7]Sumit D. Mediratta, Jeffrey T. Draper:
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router. ASAP 2007: 69-75- [c6]Sumit D. Mediratta, Jeffrey T. Draper:
Characterization of a Fault-tolerant NoC Router. ISCAS 2007: 381-384 - 2006
- [c5]Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper:
A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. ISCAS 2006 - 2005
- [j1]Jeffrey T. Draper, Tim Barrett, Jeff Sondeen, Sumit D. Mediratta, Chang Woo Kang, Ihn Kim, Gokhan Daglikoca:
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System. J. VLSI Signal Process. 40(1): 73-84 (2005) - [c4]Sumit D. Mediratta, Jeffrey T. Draper:
Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System. HiPC 2005: 407-419 - [c3]Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper:
An area-efficient and protected network interface for processing-in-memory systems. ISCAS (3) 2005: 2951-2954 - 2004
- [c2]Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper:
An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. VLSI Design 2004: 863-868 - 2002
- [c1]Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim:
Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. ASAP 2002: 163-172
Coauthor Index
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