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Ezequiel Herruzo
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2010 – 2019
- 2012
- [c10]A. D. Santana Gil, Manuel Hernandez Calviño, Francisco Javier Quiles-Latorre, Ezequiel Herruzo Gomez, José Ignacio Benavides Benítez:
Optimizing the physical implementation of a reconfigurable cache. ReConFig 2012: 1-6 - 2011
- [c9]Carlos García-García, Juan Gómez-Luna, Ezequiel Herruzo Gomez, José Ignacio Benavides Benítez:
simARQ, An Automatic Repeat Request Simulator for Teaching Purposes. IT Revolutions 2011: 202-211 - 2010
- [c8]A. D. Santana Gil, José Ignacio Benavides Benítez, Manuel Hernandez Calviño, Ezequiel Herruzo Gomez:
Reconfigurable Cache Implemented on an FPGA. ReConFig 2010: 250-255
2000 – 2009
- 2009
- [j2]Juan Gómez-Luna, Ezequiel Herruzo, José Ignacio Benavides:
MESI Cache Coherence Simulator for Teaching Purposes. CLEI Electron. J. 12(1) (2009) - 2008
- [j1]Ricardo Quislant, Ezequiel Herruzo, Oscar G. Plata, José Ignacio Benavides, Emilio L. Zapata:
Teaching the Cache Memory System Using a Reconfigurable Approach. IEEE Trans. Educ. 51(3): 336-341 (2008) - [c7]Ezequiel Herruzo, Oscar G. Plata, Emilio L. Zapata:
Using Padding to Optimize Locality in Scientific Applications. ICCS (1) 2008: 863-872 - 2007
- [c6]Ezequiel Herruzo, José Ignacio Benavides, Ricardo Quislant, Emilio L. Zapata, Oscar G. Plata:
Simulating a Reconfigurable Cache System for Teaching Purposes. MSE 2007: 37-38 - [c5]Ezequiel Herruzo, Guillermo Ruíz, José Ignacio Benavides, Oscar G. Plata:
A New Parallel Sorting Algorithm based on Odd-Even Mergesort. PDP 2007: 18-22 - [c4]Ezequiel Herruzo, Emilio L. Zapata, Oscar G. Plata:
Maximum and Sorted Cache Occupation Using Array Padding. ICSAMOS 2007: 178-185 - 2005
- [c3]Ezequiel Herruzo, Gerardo Bandera, Oscar G. Plata, Emilio L. Zapata:
Reducing Cache Misses by Loop Reordering. PARCO 2005: 541-548 - [c2]Ezequiel Herruzo, Andrés J. Mesones, José I. Benavides, Oscar G. Plata, Emilio L. Zapata:
Distributed Architecture System for Computer Performance Testing. PPAM 2005: 140-147 - 2004
- [c1]Ezequiel Herruzo, Gerardo Bandera, Oscar G. Plata:
Applying Loop Tiling and Unrolling to a Sparse Kernel Code. International Conference on Computational Science 2004: 409-412
Coauthor Index
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