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ORCIDYatin Vasant Hoskote
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2010 – 2019
- 2012
[c11]Praveen Salihundam, Mohammed Asadullah Khan
, Shailendra Jain, Yatin Vasant Hoskote, Satish Yada, Shasi Kumar, Vasantha Erraguntla, Sriram R. Vangal, Nitin Borkar:
A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip. VLSI Design 2012: 292-297- 2011
- [j9]Praveen Salihundam, Shailendra Jain, Tiju Jacob, Shasi Kumar, Vasantha Erraguntla, Yatin Vasant Hoskote, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar:
A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS. IEEE J. Solid State Circuits 46(4): 757-766 (2011) - 2010
- [c10]Jason Howard, Saurabh Dighe, Yatin Vasant Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson:
A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. ISSCC 2010: 108-109 - [c9]Shailendra Jain, Vasantha Erraguntla, Sriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Tulasi Mandepudi, V. P. Karthik:
A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm. VLSI Design 2010: 252-257
2000 – 2009
- 2009
- [j8]Radu Marculescu, Ümit Y. Ogras, Li-Shiuan Peh, Natalie D. Enright Jerger, Yatin Vasant Hoskote:
Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 3-21 (2009) - 2008
- [j7]Yatin Vasant Hoskote, Radu Marculescu, Li-Shiuan Peh:
Guest Editors' Introduction: Tackling Key Problems in NoCs. IEEE Des. Test Comput. 25(5): 400-401 (2008) - [j6]Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Vasantha Erraguntla, Clark Roberts, Yatin Vasant Hoskote, Nitin Borkar, Shekhar Borkar:
An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. IEEE J. Solid State Circuits 43(1): 29-41 (2008) - 2006
- [j5]Sriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Atila Alvandpour:
A 6.2-GFlops Floating-Point Multiply-Accumulator With Conditional Normalization. IEEE J. Solid State Circuits 41(10): 2314-2323 (2006) - 2003
- [j4]Yatin Vasant Hoskote, Bradley A. Bloechel, Gregory E. Dermer, Vasantha Erraguntla, David Finan, Jason Howard, Dan Klowden, Siva G. Narendra, Greg Ruhl, James W. Tschanz, Sriram R. Vangal, Venkat Veeramachaneni, Howard Wilson, Jianping Xu, Nitin Borkar:
A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS. IEEE J. Solid State Circuits 38(11): 1866-1875 (2003)
1990 – 1999
- 1999
- [c8]Yatin Vasant Hoskote, Timothy Kam, Pei-Hsin Ho, Xudong Zhao:
Coverage Estimation for Symbolic Model Checking. DAC 1999: 300-305 - 1998
- [j3]Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote:
Abstraction Techniques for Validation Coverage Analysis and Test Generation. IEEE Trans. Computers 47(1): 2-14 (1998) - 1997
- [j2]Yatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell, John Moondanos:
Automatic verification of implementations of large circuits against HDL specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(3): 217-228 (1997) - 1996
- [c7]Yirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O'Leary, Xudong Zhao:
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. FMCAD 1996: 19-33 - [c6]Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote:
A Unified Framework for Design Validation and Manufacturing Test. ITC 1996: 875-884 - 1995
- [c5]Yatin Vasant Hoskote, Jacob A. Abraham, Donald S. Fussell:
Automated verification of temporal properties specified as state machines in VHDL. Great Lakes Symposium on VLSI 1995: 100-105 - [c4]Yatin Vasant Hoskote, Dinos Moundanos, Jacob A. Abraham:
Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. ICCD 1995: 532-537 - [c3]Ashok Balivada, Yatin Vasant Hoskote, Jacob A. Abraham:
Verification of transient response of linear analog circuits. VTS 1995: 42-47 - 1994
- [c2]Yatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell:
Abstraction of data path registers for multilevel verification of large circuits. Great Lakes Symposium on VLSI 1994: 11-14 - [c1]Yatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell:
Verification of Circuits Described in VHDL through Extraction of Design Intent. VLSI Design 1994: 417-420 - 1992
- [j1]V. S. S. Nair, Yatin Vasant Hoskote, Jacob A. Abraham:
Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor Systems. IEEE Trans. Computers 41(5): 532-541 (1992)
Coauthor Index
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