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2020 – today
- 2024
[b1]Anni Lu:
Algorithm-Hardware Co-design for Deep Learning and Probabilistic Computing with Compute-in-Memory Accelerators. Georgia Institute of Technology, Atlanta, GA, USA, 2024- [j13]Po-Kai Hsu
, Vaidehi Garg, Anni Lu, Shimeng Yu:
A Heterogeneous Platform for 3D NAND-Based In-Memory Hyperdimensional Computing Engine for Genome Sequencing Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1628-1637 (2024) - [j12]Junmo Lee, Anni Lu, Wantong Li, Shimeng Yu:
NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1733-1744 (2024) - [j11]Yuan-Chun Luo, Anni Lu, Yandong Luo, Sou-Chi Chang, Uygar Avci, Shimeng Yu:
Endurance-Aware Compiler for 3-D Stackable FeRAM as Global Buffer in TPU-Like Architecture. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1696-1703 (2024) - [j10]Yuan-Chun Luo, Anni Lu, Janak Sharda, Moritz Scherer, Jorge Tomás Gómez, Syed Shakib Sarwar, Ziyun Li, Reid Frederick Pinkham, Barbara De Salvo, Shimeng Yu:
Thermally Constrained Codesign of Heterogeneous 3-D Integration of Compute-in-Memory, Digital ML Accelerator, and RISC-V Cores for Mixed ML and Non-ML Workloads. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1718-1725 (2024) - [c9]Yuan-Chun Luo, James Read, Anni Lu, Shimeng Yu:
A Cross-layer Framework for Design Space and Variation Analysis of Non-Volatile Ferroelectric Capacitor-Based Compute-in-Memory Accelerators. ASPDAC 2024: 159-164 - [c8]Anni Lu, Junmo Lee, Yuan-Chun Luo, Hai Li, Ian A. Young, Shimeng Yu:
Digital CIM with Noisy SRAM Bit: A Compact Clustered Annealer for Large-Scale Combinatorial Optimization. DAC 2024: 78:1-78:6 - 2023
- [j9]Anni Lu, Jae Hur, Yuan-Chun Luo, Hai Li, Dmitri E. Nikonov, Ian A. Young, Yang-Kyu Choi, Shimeng Yu:
Scalable In-Memory Clustered Annealer With Temporal Noise of Charge Trap Transistor for Large Scale Travelling Salesman Problems. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 422-435 (2023) - [c7]Minah Lee, Anni Lu, Mandovi Mukherjee, Shimeng Yu, Saibal Mukhopadhyay:
CLUE: Cross-Layer Uncertainty Estimator for Reliable Neural Perception using Processing-in-Memory Accelerators. IJCNN 2023: 1-8 - 2022
- [j8]Jae Hur, Yuan-Chun Luo, Anni Lu, Tzu-Han Wang, Shaolan Li, Asif Islam Khan, Shimeng Yu:
Nonvolatile Capacitive Crossbar Array for In-Memory Computing. Adv. Intell. Syst. 4(8) (2022) - [j7]Saurabh Dash, Yandong Luo, Anni Lu, Shimeng Yu, Saibal Mukhopadhyay:
Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision Computation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1006-1019 (2022) - [j6]Yuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu:
Design and Optimization of Non-Volatile Capacitive Crossbar Array for In-Memory Computing. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 784-788 (2022) - [c6]Gihun Choe, Prasanna Venkatesan Ravindran, Anni Lu, Jae Hur, Maximilian Lederer, André Reck, Sarah Lombardo, Nashrah Afroze, Josh Kacher, Asif Islam Khan, Shimeng Yu:
Machine Learning Assisted Statistical Variation Analysis of Ferroelectric Transistors: From Experimental Metrology to Predictive Modeling. VLSI Technology and Circuits 2022: 336-337 - 2021
- [j5]Beomseok Kang, Anni Lu, Yun Long, Daehyun Kim, Shimeng Yu, Saibal Mukhopadhyay:
Genetic Algorithm-Based Energy-Aware CNN Quantization for Processing-In-Memory Architecture. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(4): 649-662 (2021) - [j4]Anni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, Shimeng Yu:
NeuroSim Simulator for Compute-in-Memory Hardware Accelerator: Validation and Benchmark. Frontiers Artif. Intell. 4: 659060 (2021) - [j3]Xiaochen Peng, Shanshi Huang, Hongwu Jiang, Anni Lu, Shimeng Yu:
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(11): 2306-2319 (2021) - [j2]Anni Lu, Xiaochen Peng, Yandong Luo, Shanshi Huang, Shimeng Yu:
A Runtime Reconfigurable Design of Compute-in-Memory-Based Hardware Accelerator for Deep Learning Inference. ACM Trans. Design Autom. Electr. Syst. 26(6): 45:1-45:18 (2021) - [c5]Anni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, Shimeng Yu:
NeuroSim Validation with 40nm RRAM Compute-in-Memory Macro. AICAS 2021: 1-4 - [c4]Anni Lu, Xiaochen Peng, Shimeng Yu:
Compute-in-RRAM with Limited On-chip Resources. AICAS 2021: 1-4 - [c3]Anni Lu, Xiaochen Peng, Yandong Luo, Shanshi Huang, Shimeng Yu:
A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator. DATE 2021: 932-937 - [c2]Shimeng Yu, Wonbo Shim, Jae Hur, Yuan-chun Luo, Gihun Choe, Wantong Li, Anni Lu, Xiaochen Peng:
Compute-in-Memory: From Device Innovation to 3D System Integration. ESSDERC 2021: 21-28 - [c1]Yuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu:
Design of Non-volatile Capacitive Crossbar Array for In-Memory Computing. IMW 2021: 1-4 - 2020
- [j1]Anni Lu, Xiaochen Peng, Yandong Luo, Shimeng Yu:
Benchmark of the Compute-in-Memory-Based DNN Accelerator With Area Constraint. IEEE Trans. Very Large Scale Integr. Syst. 28(9): 1945-1952 (2020) - [i1]Xiaochen Peng, Shanshi Huang, Hongwu Jiang, Anni Lu, Shimeng Yu:
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training. CoRR abs/2003.06471 (2020)
Coauthor Index
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