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ORCIDNorman J. Rohrer
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2000 – 2009
- 2007
[c2]David Money Harris, Norman J. Rohrer:
SE6 Secure Digital Systems. ISSCC 2007: 372-373- 2006
- [j3]Kerry Bernstein, David J. Frank, Anne E. Gattiker, Wilfried Haensch, Brian L. Ji, Sani R. Nassif, Edward J. Nowak, Dale J. Pearson, Norman J. Rohrer:
High-performance CMOS variability in the 65-nm regime and beyond. IBM J. Res. Dev. 50(4-5): 433-450 (2006) - [c1]Erwin B. Cohen, Norman J. Rohrer, Peter A. Sandon, Miles G. Canada, Cédric Lichtenau, Mathew I. Ringler, Paul Kartschoke, Robert Floyd, Jan Heaslip, M. Ross, Thomas Pflueger, Rolf B. Hilgendorf, Pete McCormick, Gerard Salem, J. Connor, Stephen F. Geissler, Dana Thygesen:
A 64B CPU Pair: Dual- and Single-Processor Chips. ISSCC 2006: 333-342 - 2005
- [j2]Norman J. Rohrer, Cédric Lichtenau, Peter A. Sandon, Paul Kartschoke, Erwin B. Cohen, Miles G. Canada, Thomas Pflüger, Mathew I. Ringler, Rolf B. Hilgendorf, Stephen F. Geissler, Jeffrey S. Zimmerman:
A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features. IEEE J. Solid State Circuits 40(1): 19-27 (2005)
1990 – 1999
- 1998
- [j1]Chekib Akrout, John Bialas, Miles G. Canada, Duane Cawthron, James Corr, Bijan Davari, Robert Floyd, Stephen F. Geissler, Ronald Goldblatt, Robert Houle, Paul Kartschoke, Diane Kramer, Pete McCormick, Norman J. Rohrer, Gerard Salem, Ronald Schulz, Lisa Su, Linda Whitney:
A 480-MHz RISC microprocessor in a 0.12-μm Leff CMOS technology with copper interconnects. IEEE J. Solid State Circuits 33(11): 1609-1616 (1998)
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