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ORCIDYinhe Han 0001
Person information
- affiliation: Chinese Academy of Sciences, Institute of Computing Technology, Research Center for Intelligent Computing Systems, Beijing, China
- affiliation: Chinese Academy of Sciences, Institute of Computing Technology, State Key Laboratory of Computer Architecture, Beijing, China
- affiliation (PhD 2006): Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China
Other persons with the same name
- Yinhe Han — disambiguation page
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2020 – today
- 2024
[j81]Yuxin Yang
, Xiaoming Chen, Yinhe Han:
JANM-IK: Jacobian Argumented Nelder-Mead Algorithm for Inverse Kinematics and its Hardware Acceleration. IEEE Comput. Archit. Lett. 23(1): 45-48 (2024)- [j80]Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang:
Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators. IEEE Des. Test 41(5): 46-54 (2024) - [j79]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication. IEEE Trans. Computers 73(6): 1427-1441 (2024) - [j78]Lian Liu, Ying Wang, Xiandong Zhao, Weiwei Chen, Huawei Li, Xiaowei Li, Yinhe Han:
An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1497-1510 (2024) - [j77]Bo Jiao, Lei Xu, Xinyu Yu, Haitao Yang, Haozhe Zhu, Yu Wang, Jundong Zhu, Dexin Wen, Lingli Wang, Jun Tao, Chixiao Chen, Yinhe Han, Qi Liu, Ninghui Sun, Ming Liu:
FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer. IEEE Trans. Circuits Syst. I Regul. Pap. 71(9): 4156-4168 (2024) - [j76]Wanqian Li, Yinhe Han, Xiaoming Chen:
Mathematical Framework for Optimizing Crossbar Allocation for ReRAM-based CNN Accelerators. ACM Trans. Design Autom. Electr. Syst. 29(1): 21:1-21:24 (2024) - [c135]Fuping Li, Ying Wang, Yujie Wang, Mengdi Wang, Yinhe Han, Huawei Li, Xiaowei Li:
Chipletizer: Repartitioning SoCs for Cost-Effective Chiplet Integration. ASPDAC 2024: 58-64 - [c134]Xiaoyang Lu, Boyu Long, Xiaoming Chen, Yinhe Han, Xian-He Sun:
ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache Optimizations. ASPLOS (3) 2024: 71-85 - [c133]Haoran Wang, Lei Wang, Haobo Xu, Ying Wang, Yuming Li, Yinhe Han:
PrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model Training. ASPLOS (3) 2024: 801-817 - [c132]Yuhui Hao, Yiming Gan, Bo Yu, Qiang Liu, Yinhe Han, Zishen Wan, Shaoshan Liu:
ORIANNA: An Accelerator Generation Framework for Optimization-based Robotic Applications. ASPLOS (2) 2024: 813-829 - [c131]Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. DAC 2024: 60:1-60:6 - [c130]Lian Liu, Zhaohui Xu, Yintao He, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han:
Drift: Leveraging Distribution-based Dynamic Precision Quantization for Efficient Deep Neural Network Acceleration. DAC 2024: 140:1-140:6 - [c129]Yibo Du, Ying Wang, Bing Li, Fuping Li, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han:
Chiplever: Towards Effortless Extension of Chiplet-based System for FHE. DAC 2024: 243:1-243:6 - [c128]Yibo Du, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han:
GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy Reduction. DATE 2024: 1-6 - [c127]Wanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMSYN: Synthesizing Processing-in-Memory CNN Accelerators. DATE 2024: 1-6 - [c126]Xinyu Wang, Xiaotian Sun, Yinhe Han, Xiaoming Chen:
PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory Accelerators. DATE 2024: 1-2 - [c125]Siqi Wen, Hanqi Jiang, Cheng Zeng, Runnan Chen, Jidong Yuan, Shuai Liang, Yinhe Han:
Depth-NeuS: Neural Implicit Surfaces Learning for Multi-view Reconstruction Based on Depth Information Optimization. ICIC (5) 2024: 47-58 - [c124]Xinquan Lin, Haobo Xu, Yinhe Han, Yiming Gan:
HEX-SIM: Evaluating Multi-modal Large Language Models on Multi-chiplet NPUs. IISWC 2024: 108-120 - [c123]Yi Chen, Bosheng Liu, Yongqi Xu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han:
Accelerating Frequency-domain Convolutional Neural Networks Inference using FPGAs. ISCAS 2024: 1-5 - [c122]Zerun Li, Xiaoming Chen, Yinhe Han:
TMiner: A Vertex-Based Task Scheduling Architecture for Graph Pattern Mining. MICRO 2024: 1295-1308 - [i16]Xinyu Wang, Xiaotian Sun, Yinhe Han, Xiaoming Chen:
PIMSIM-NN: An ISA-based Simulation Framework for Processing-in-Memory Accelerators. CoRR abs/2402.18089 (2024) - [i15]Wanqian Li, Xiaotian Sun, Xinyu Wang, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMSYN: Synthesizing Processing-in-memory CNN Accelerators. CoRR abs/2402.18114 (2024) - [i14]Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. CoRR abs/2403.11202 (2024) - [i13]Yiyang Huang, Yuhui Hao, Bo Yu, Feng Yan, Yuxin Yang, Feng Min, Yinhe Han, Lin Ma, Shaoshan Liu, Qiang Liu, Yiming Gan:
Corki: Enabling Real-time Embodied AI Robots via Algorithm-Architecture Co-Design. CoRR abs/2407.04292 (2024) - [i12]Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang:
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. CoRR abs/2407.08473 (2024) - [i11]Yilun Zhao, Bingmeng Wang, Wenle Jiang, Xiwei Pan, Bing Li, Yinhe Han, Ying Wang:
SuperEncoder: Towards Universal Neural Approximate Quantum State Preparation. CoRR abs/2408.05435 (2024) - [i10]Zixuan Wang, Bo Yu, Junzhe Zhao, Wenhao Sun, Sai Hou, Shuai Liang, Xing Hu, Yinhe Han, Yiming Gan:
KARMA: Augmenting Embodied AI Agents with Long-and-short Term Memory Systems. CoRR abs/2409.14908 (2024) - [i9]Yongqi Xu, Yujian Lee, Gao Yi, Bosheng Liu, Yucong Chen, Peng Liu, Jigang Wu, Xiaoming Chen, Yinhe Han:
BitQ: Tailoring Block Floating Point Precision for Improved DNN Efficiency on Resource-Constrained Devices. CoRR abs/2409.17093 (2024) - [i8]Lian Liu, Haimeng Ren, Long Cheng, Zhaohui Xu, Yudong Pan, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang:
COMET: Towards Partical W4A4KV4 LLMs Serving. CoRR abs/2410.12168 (2024) - 2023
- [j75]Chengsi Gao, Ying Wang, Yinhe Han, Weiwei Chen, Lei Zhang:
IVP: An Intelligent Video Processing Architecture for Video Streaming. IEEE Trans. Computers 72(1): 264-277 (2023) - [j74]Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 2889-2902 (2023) - [j73]Bosheng Liu, Zhuoshen Jiang, Yalan Wu, Jigang Wu, Xiaoming Chen, Peng Liu, Qingguo Zhou, Yinhe Han:
Frequency-Domain Inference Acceleration for Convolutional Neural Networks Using ReRAMs. IEEE Trans. Parallel Distributed Syst. 34(12): 3133-3146 (2023) - [c121]Bosheng Liu, Hongyi Liang, Jigang Wu, Xiaoming Chen, Peng Liu, Yinhe Han:
Accelerating Convolutional Neural Networks in Frequency Domain via Kernel-Sharing Approach. ASP-DAC 2023: 733-738 - [c120]Cangyuan Li, Ying Wang, Huawei Li, Yinhe Han:
APPEND: Rethinking ASIP Synthesis in the Era of AI. DAC 2023: 1-6 - [c119]Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. DAC 2023: 1-6 - [c118]Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han:
FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator. DAC 2023: 1-6 - [c117]Chengsi Gao, Ying Wang, Cheng Liu, Mengdi Wang, Weiwei Chen, Yinhe Han, Lei Zhang:
Layer-Puzzle: Allocating and Scheduling Multi-task on Multi-core NPUs by Using Layer Heterogeneity. DATE 2023: 1-6 - [c116]Shixin Zhao, Songyun Qu, Ying Wang, Yinhe Han:
ENASA: Towards Edge Neural Architecture Search based on CIM acceleration. DATE 2023: 1-2 - [c115]Haoran Wang, Haobo Xu, Ying Wang, Yinhe Han:
CTA: Hardware-Software Co-design for Compressed Token Attention Mechanism. HPCA 2023: 429-441 - [c114]Boyu Long, Libo Shen, Xiaoyu Zhang, Yinhe Han, Xian-He Sun, Xiaoming Chen:
Meltrix: A RRAM-Based Polymorphic Architecture Enhanced by Function Synthesis. ICCAD 2023: 1-9 - [c113]Libo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang, Yinhe Han, Xiaoming Chen:
LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture. ICCAD 2023: 1-9 - [c112]Yilun Zhao, Yu Chen, He Li, Ying Wang, Kaiyan Chang, Bingmeng Wang, Bing Li, Yinhe Han:
Full State Quantum Circuit Simulation Beyond Memory Limit. ICCAD 2023: 1-9 - [c111]Yibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han:
PANG: A Pattern-Aware GCN Accelerator for Universal Graphs. ICCD 2023: 263-266 - [c110]Rui Tang, Xiaoyu Zhang, Rui Liu, Zhejian Luo, Xiaoming Chen, Yinhe Han:
Hardware-Software Co-Design for Content-Based Sparse Attention. ICCD 2023: 415-418 - [c109]Yuxin Yang, Xiaoming Chen, Yinhe Han:
Dadu-RBD: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines. MICRO 2023: 297-309 - [i7]Hanqi Jiang, Cheng Zeng, Runnan Chen, Shuai Liang, Yinhe Han, Yichao Gao, Conglin Wang:
Depth-NeuS: Neural Implicit Surfaces Learning for Multi-view Reconstruction Based on Depth Information Optimization. CoRR abs/2303.17088 (2023) - [i6]Kaiyan Chang, Ying Wang, Haimeng Ren, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
ChipGPT: How far are we from natural language hardware design. CoRR abs/2305.14019 (2023) - [i5]Xiaotian Sun, Xinyu Wang, Wanqian Li, Lei Wang, Yinhe Han, Xiaoming Chen:
PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators. CoRR abs/2307.01475 (2023) - [i4]Yuxin Yang, Xiaoming Chen, Yinhe Han:
RBDCore: Robot Rigid Body Dynamics Accelerator with Multifunctional Pipelines. CoRR abs/2307.02274 (2023) - 2022
- [j72]Hang Xiao, Haobo Xu, Ying Wang, Yujie Wang, Yinhe Han:
LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks. IEEE Comput. Archit. Lett. 21(1): 29-32 (2022) - [j71]Xiaohan Ma, Ying Wang, Yujie Wang, Xuyi Cai, Yinhe Han:
Survey on chiplets: interface, interconnect and integration methodology. CCF Trans. High Perform. Comput. 4(1): 43-52 (2022) - [j70]Hang Xiao, Haobo Xu, Xiaoming Chen, Yujie Wang, Yinhe Han:
Fast and High-Accuracy Approximate MAC Unit Design for CNN Computing. IEEE Embed. Syst. Lett. 14(3): 155-158 (2022) - [j69]Feng Min, Ying Wang, Haobo Xu, Junpei Huang, Yujie Wang, Xingqi Zou, Meixuan Lu, Yinhe Han:
Dadu-SV: Accelerate Stereo Vision Processing on NPU. IEEE Embed. Syst. Lett. 14(4): 191-194 (2022) - [j68]Zihao Sun, Yu Hu, Longxing Yang, Shun Lu, Jilin Mei, Yinhe Han, Xiaowei Li:
STC-NAS: Fast neural architecture search with source-target consistency. Neurocomputing 497: 227-238 (2022) - [j67]Yalan Wu, Jigang Wu, Peng Liu, Yinhe Han, Thambipillai Srikanthan:
Reconfiguration algorithms for synchronous communication on switch based degradable arrays. Parallel Comput. 111: 102901 (2022) - [j66]Weidong Cao, Yilong Zhao, Adith Boloor, Yinhe Han, Xuan Zhang, Li Jiang:
Neural-PIM: Efficient Processing-In-Memory With Neural Approximation of Peripherals. IEEE Trans. Computers 71(9): 2142-2155 (2022) - [j65]Bosheng Liu, Xiaoming Chen, Yinhe Han, Jigang Wu, Liang Chang, Peng Liu, Haobo Xu:
Search-Free Inference Acceleration for Sparse Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2156-2169 (2022) - [j64]Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Yinhe Han, Lei Zhang:
Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3993-4003 (2022) - [j63]Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen:
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 5071-5084 (2022) - [j62]Haobo Xu, Yuxin Yang, Feng Min, Junpei Huang, Xiaoming Chen, Yinhe Han, Ninghui Sun:
Toward Efficient Computing for Robotics: From a Circuit and System View. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3051-3056 (2022) - [j61]Yalan Wu, Jigang Wu, Long Chen, Jiaquan Yan, Yinhe Han:
Load Balance Guaranteed Vehicle-to-Vehicle Computation Offloading for Min-Max Fairness in VANETs. IEEE Trans. Intell. Transp. Syst. 23(8): 11994-12013 (2022) - [c108]Zerun Li, Xiaoming Chen, Yinhe Han:
Optimal Data Allocation for Graph Processing in Processing-in-Memory Systems. ASP-DAC 2022: 238-243 - [c107]Xiaoming Chen, Yinhe Han:
Solving Least-Squares Fitting in $O(1)$ Using RRAM-based Computing-in-Memory Technique. ASP-DAC 2022: 339-344 - [c106]Rui Liu, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang:
FeMIC: Multi-Operands in-Memory Computing Based on FeFETs. ASP-DAC 2022: 678-683 - [c105]Zerun Li, Xiaoming Chen, Yinhe Han:
GraphRing: an HMC-ring based graph processing framework with optimized data movement. DAC 2022: 1063-1068 - [c104]Hang Xiao, Haobo Xu, Xiaoming Chen, Yujie Wang, Yinhe Han:
P3S: A High Accuracy Probabilistic Prediction Processing System for CNN Acceleration. ACM Great Lakes Symposium on VLSI 2022: 237-242 - [c103]Wanqian Li, Yinhe Han, Xiaoming Chen:
Energy-Efficient In-SRAM Accumulation for CMOS-based CNN Accelerators. ACM Great Lakes Symposium on VLSI 2022: 293-298 - [c102]Zhenyu Quan, Xiaoming Chen, Yinhe Han:
AIC-Bench: Workload Selection Methodology for Benchmarking AI Chips. HPCC/DSS/SmartCity/DependSys 2022: 687-694 - [c101]Zhiwen Xie, Yinhe Han, Xiaoming Chen:
PME: Processing-in-memory Masking and Encoding for Secure NVM. HPCC/DSS/SmartCity/DependSys 2022: 1501-1508 - [c100]Fuping Li, Ying Wang, Yuanqing Cheng, Yujie Wang, Yinhe Han, Huawei Li, Xiaowei Li:
GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration. ICCAD 2022: 42:1-42:9 - [c99]Zihao Sun, Yu Hu, Shun Lu, Longxing Yang, Jilin Mei, Yinhe Han, Xiaowei Li:
AGNAS: Attention-Guided Micro and Macro-Architecture Search. ICML 2022: 20777-20789 - [c98]Longxing Yang, Yu Hu, Shun Lu, Zihao Sun, Jilin Mei, Yinhe Han, Xiaowei Li:
Searching for BurgerFormer with Micro-Meso-Macro Space Design. ICML 2022: 25055-25069 - [c97]Jingyu Niu, Yu Hu, Wei Li, Guangyan Huang, Yinhe Han, Xiaowei Li:
Closing the Dynamics Gap via Adversarial and Reinforcement Learning for High-Speed Racing. IJCNN 2022: 1-10 - [c96]Xuyi Cai, Ying Wang, Xiaohan Ma, Yinhe Han, Lei Zhang:
DeepBurning-SEG: Generating DNN Accelerators of Segment-Grained Pipeline Architecture. MICRO 2022: 1396-1413 - [i3]Weidong Cao, Yilong Zhao, Adith Boloor, Yinhe Han, Xuan Zhang, Li Jiang:
Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripherals. CoRR abs/2201.12861 (2022) - 2021
- [j60]Xingqi Zou, Sheng Xu, Xiaoming Chen, Liang Yan, Yinhe Han:
Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology. Sci. China Inf. Sci. 64(6) (2021) - [j59]Feng Min, Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Xingqi Zou, Bei Li, Yinhe Han:
Dadu-Eye: A 5.3 TOPS/W, 30 fps/1080p High Accuracy Stereo Vision Accelerator. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4207-4220 (2021) - [j58]Peng Liu, Zhiqiang You, Jigang Wu, Bosheng Liu, Yinhe Han, Krishnendu Chakrabarty:
Fault Modeling and Efficient Testing of Memristor-Based Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4444-4455 (2021) - [j57]Lian Yao, Peng Liu, Jigang Wu, Yinhe Han, Yuehang Zhong, Zhiqiang You:
Integrating Two Logics Into One Crossbar Array for Logic Gate Design. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2987-2991 (2021) - [j56]Peng Liu, Zhiqiang You, Jigang Wu, Michael Elimu, Weizheng Wang, Shuo Cai, Yinhe Han:
Defect Analysis and Parallel Testing for 3D Hybrid CMOS-Memristor Memory. IEEE Trans. Emerg. Top. Comput. 9(2): 745-758 (2021) - [j55]Peipei Yin, Chenghua Wang, Haroon Waris, Weiqiang Liu, Yinhe Han, Fabrizio Lombardi:
Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine Learning. IEEE Trans. Sustain. Comput. 6(4): 612-625 (2021) - [c95]Longxing Yang, Yu Hu, Shun Lu, Zihao Sun, Jilin Mei, Yiming Zeng, Zhiping Shi, Yinhe Han, Xiaowei Li:
DDSAS: Dynamic and Differentiable Space-Architecture Search. ACML 2021: 284-299 - [c94]Xiaoming Chen, Yuping Wu, Yinhe Han:
FePIM: Contention-Free In-Memory Computing Based on Ferroelectric Field-Effect Transistors. ASP-DAC 2021: 114-119 - [c93]Bosheng Liu, Zhuoshen Jiang, Jigang Wu, Xiaoming Chen, Yinhe Han, Peng Liu:
F3D: Accelerating 3D Convolutional Neural Networks in Frequency Space Using ReRAM. DAC 2021: 571-576 - [c92]Tao Song, Xiaoming Chen, Xiaoyu Zhang, Yinhe Han:
BRAHMS: Beyond Conventional RRAM-based Neural Network Accelerators Using Hybrid Analog Memory System. DAC 2021: 1033-1038 - [c91]Tao Song, Xiaoming Chen, Yinhe Han:
Eliminating Iterations of Iterative Methods: Solving Large-Scale Sparse Linear System in O(1) with RRAM-based In-Memory Accelerator. ACM Great Lakes Symposium on VLSI 2021: 71-76 - [c90]Wei Li, Yu Hu, Yinhe Han, Xiaowei Li:
KFS-LIO: Key-Feature Selection for Lightweight Lidar Inertial Odometry. ICRA 2021: 5042-5048 - [c89]Liang Yan, Mingzhe Zhang, Rujia Wang, Xiaoming Chen, Xingqi Zou, Xiaoyang Lu, Yinhe Han, Xian-He Sun:
CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications. ISLPED 2021: 1-6 - [c88]Xiaoming Chen, Tao Song, Yinhe Han:
RRAM-based Analog In-Memory Computing : Invited Paper. NANOARCH 2021: 1-6 - 2020
- [j54]Hang Lu, Mingzhe Zhang, Yinhe Han, Qi Wang, Huawei Li, Xiaowei Li:
Architecting Effectual Computation for Machine Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2654-2667 (2020) - [j53]Bosheng Liu, Xiaoming Chen, Yinhe Han, Haobo Xu:
Swallow: A Versatile Accelerator for Sparse Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4881-4893 (2020) - [c87]Zhao Wang, Yijin Guan, Guangyu Sun, Dimin Niu, Yuhao Wang, Hongzhong Zheng, Yinhe Han:
GNN-PIM: A Processing-in-Memory Architecture for Graph Neural Networks. ACA 2020: 73-86 - [c86]Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li:
Search-free Accelerator for Sparse Convolutional Neural Networks. ASP-DAC 2020: 524-529 - [c85]Beibei Jin, Yu Hu, Qiankun Tang, Jingyu Niu, Zhiping Shi, Yinhe Han, Xiaowei Li:
Exploring Spatial-Temporal Multi-Frequency Analysis for High-Fidelity and Temporal-Consistency Video Prediction. CVPR 2020: 4553-4562 - [c84]Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han, Li Jiang:
PIM-Prune: Fine-Grain DCNN Pruning for Crossbar-Based Process-In-Memory Architecture. DAC 2020: 1-6 - [c83]Yongchen Wang, Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li:
An Efficient Deep Learning Accelerator for Compressed Video Analysis. DAC 2020: 1-6 - [c82]Yuxin Yang, Xiaoming Chen, Yinhe Han:
Dadu-CD: Fast and Efficient Processing-in-Memory Accelerator for Collision Detection. DAC 2020: 1-6 - [c81]Sheng Xu, Xiaoming Chen, Xuehai Qian, Yinhe Han:
TUPIM: A Transparent and Universal Processing-in-Memory Architecture for Unmodified Binaries. ACM Great Lakes Symposium on VLSI 2020: 199-204 - [c80]Yuxin Yang, Shiqi Lian, Xiaoming Chen, Yinhe Han:
Accelerating RRT Motion Planning Using TCAM. ACM Great Lakes Symposium on VLSI 2020: 481-486 - [c79]Xiaoming Chen, Yinhe Han, Yu Wang:
Communication Lower Bound in Convolution Accelerators. HPCA 2020: 529-541 - [c78]Yinhe Han, Yuxin Yang, Xiaoming Chen, Shiqi Lian:
DaDu Series - Fast and Efficient Robot Accelerators. ICCAD 2020: 165:1-165:8 - [c77]Jingyu Niu, Yu Hu, Beibei Jin, Yinhe Han, Xiaowei Li:
Two-Stage Safe Reinforcement Learning for High-Speed Autonomous Racing. SMC 2020: 3934-3941 - [i2]Beibei Jin, Yu Hu, Qiankun Tang, Jingyu Niu, Zhiping Shi, Yinhe Han, Xiaowei Li:
Exploring Spatial-Temporal Multi-Frequency Analysis for High-Fidelity and Temporal-Consistency Video Prediction. CoRR abs/2002.09905 (2020)
2010 – 2019
- 2019
- [j52]Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li:
PIMSim: A Flexible and Detailed Processing-in-Memory Simulator. IEEE Comput. Archit. Lett. 18(1): 6-9 (2019) - [j51]Bosheng Liu, Xiaoming Chen, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li:
Accelerating DNN-based 3D point cloud processing for mobile computing. Sci. China Inf. Sci. 62(11): 212206:1-212206:11 (2019) - [j50]Shichang Zhang, Ying Wang, Xiaoming Chen, Yinhe Han, Yujie Wang, Xiaowei Li:
Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator. IEICE Electron. Express 16(14): 20190145 (2019) - [j49]Xiaoming Chen, Kai Ni, Michael T. Niemier, Yinhe Han, Suman Datta, Xiaobo Sharon Hu:
Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1780-1793 (2019) - [j48]Xiaoming Chen, Danny Ziyi Chen, Yinhe Han, Xiaobo Sharon Hu:
moDNN: Memory Optimal Deep Neural Network Training on Graphics Processing Units. IEEE Trans. Parallel Distributed Syst. 30(3): 646-661 (2019) - [c76]Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li:
CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. ASP-DAC 2019: 140-145 - [c75]Jiajun Li, Ying Wang, Bosheng Liu, Yinhe Han, Xiaowei Li:
Simulate-the-hardware: training accurate binarized neural networ