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ORCIDTakakazu Kurokawa
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2020 – today
- 2022
[c29]Yuki Shibuya, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
FPGA Implementation of Stream Cipher SOSEMANUK. CANDARW 2022: 83-89- 2021
- [c28]Manh Tuan Nguyen, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
Acceleration and higher precision by discrete wavelet transform for single image super-resolution using convolutional neural networks. CANDAR (Workshops) 2021: 166-172 - 2020
- [c27]Yuichi Kamina, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
A Translator from FDL to SystemVerilog for FPGA Implementation of Fuzzy Inference. CANDAR (Workshops) 2020: 87-92
2010 – 2019
- 2019
- [j11]Thuong Nguyen Dat, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
Implementation of high speed hash function Keccak on GPU. Int. J. Netw. Comput. 9(2): 370-389 (2019) - 2018
- [c26]Takeo Ueki, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
AQSS: Accelerator of Quantization Neural Networks with Stochastic Approach. CANDAR Workshops 2018: 138-144 - [c25]Takeo Ueki, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
Learning Accelerator of Deep Neural Networks with Logarithmic Quantization. IIAI-AAI 2018: 634-638 - 2017
- [c24]Toshihiro Nakamura, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
Implementation of Hash Function Generator on Schematic to Program Translator(SPT). CANDAR 2017: 469-474 - [c23]Thuong Nguyen Dat, Keisuke Iwai, Takakazu Kurokawa:
Implementation of High Speed Hash Function Keccak Using CUDA on GTX 1080. CANDAR 2017: 475-481 - 2015
- [c22]Haruhisa Kosuge, Hidema Tanaka, Keisuke Iwai, Takakazu Kurokawa:
Integral Attack on Reduced-Round Rectangle. CSCloud 2015: 68-73 - [c21]Haruhisa Kosuge, Hidema Tanaka, Keisuke Iwai, Takakazu Kurokawa:
Computational Security Evaluation of Light-Weight Block Cipher Against Integral Attack by GPGPU. CSCloud 2015: 439-444 - [c20]Yuki Tabata, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Improved GPU Implementation of RainbowCrack. CANDAR 2015: 616-618 - [c19]Haruhisa Kosuge, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Search Algorithm of Precise Integral Distinguisher of Byte-Based Block Cipher. ICISS 2015: 303-323 - 2014
- [j10]Naoki Nishikawa, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Throughput and Power Efficiency Evaluation of Block Ciphers on Kepler and GCN GPUs Using Micro-Benchmark Analysis. IEICE Trans. Inf. Syst. 97-D(6): 1506-1515 (2014) - [j9]Hiroaki Mizuno, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Analysis of Side-Channel Attack Based on Information Theory. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(7): 1523-1532 (2014) - [c18]Enkhbold Chimedtseren, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Intrusion detection system using Discrete Fourier Transform. CISDA 2014: 1-5 - [c17]Junhan Park, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Analysis of Slow Read DoS attack. ISITA 2014: 60-64 - 2013
- [j8]Keisuke Iwai, Naoki Nishikawa, Takakazu Kurokawa:
HiCrypt: A Specialized Translator for Symmetric Block Cipher and GPGPU. IEICE Trans. Inf. Syst. 96-D(12): 2575-2586 (2013) - [c16]Naoki Nishikawa, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Throughput and Power Efficiency Evaluations of Block Ciphers on Kepler and GCN GPUs. CANDAR 2013: 366-372 - [c15]Hiroaki Mizuno, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Information Theoretical Analysis of Side-Channel Attack. ICISS 2013: 255-269 - [c14]Naoki Nishikawa, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
Performance Prediction Model for Block Ciphers on GPU Architectures. NSS 2013: 405-423 - 2012
- [j7]Keisuke Iwai, Naoki Nishikawa, Takakazu Kurokawa:
Acceleration of AES encryption on CUDA GPU. Int. J. Netw. Comput. 2(1): 131-145 (2012) - [j6]Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa:
High-Performance Symmetric Block Ciphers on Multicore CPU and GPUs. Int. J. Netw. Comput. 2(2): 251-268 (2012) - [c13]Keisuke Iwai, Naoki Nishikawa, Takakazu Kurokawa:
HiCrypt: C to CUDA Translator for Symmetric Block Ciphers. ICNC 2012: 41-48 - [c12]Hiroaki Mizuno, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa:
A Correlation Power Analysis Countermeasure for Enocoro-128 v2 Using Random Switching Logic. ICNC 2012: 326-328 - [c11]Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa:
Power Efficiency Evaluation of Block Ciphers on GPU-Integrated Multicore Processor. ICA3PP (1) 2012: 347-361 - 2011
- [c10]Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa:
High-Performance Symmetric Block Ciphers on CUDA. ICNC 2011: 221-227 - 2010
- [c9]Keisuke Iwai, Takakazu Kurokawa, Naoki Nishikawa:
AES Encryption Implementation on CUDA GPU and Its Analysis. ICNC 2010: 209-214
2000 – 2009
- 2006
- [j5]Takeshi Kumaki, Keisuke Iwai, Takakazu Kurokawa:
A flexible multiport content-addressable memory. Syst. Comput. Jpn. 37(11): 57-67 (2006) - [c8]Takakazu Kurokawa:
Neural network approach to the optimal lut assignment in FPGA for parallel multipliers over GF(2n). Artificial Intelligence and Soft Computing 2006: 138-143 - 2005
- [c7]Lory Kimsoeun, Takakazu Kurokawa, Keisuke Iwai:
Finite Field Parallel Multiplier for FPGA. ECIW 2005: 157-164 - 2004
- [j4]Takakazu Kurokawa, Ken Takeshita:
Air transportation planning using neural networks as an example of the transportation squadron in the Japan Air Self-Defense Force. Syst. Comput. Jpn. 35(12): 46-56 (2004) - [c6]Koujin Kambara, Keisuke Iwai, Takakazu Kurokawa:
Javar-kai: Automatic parallelizing compiler. Parallel and Distributed Computing and Networks 2004: 470-475 - 2003
- [c5]Hirotsuga Kajisaki, Takakazu Kurokawa:
SEBSW-2: SEcret-Key Block Cipher SWitcher. VLSI 2003: 317-323 - 2001
- [j3]Keniti Gonoi, Takakazu Kurokawa:
Neural network approach to the ECM problem. Syst. Comput. Jpn. 32(1): 62-70 (2001)
1990 – 1999
- 1993
- [j2]Kazuo Tokito, Takakazu Kurokawa, Yoshiaki Koga:
Realization of a self-testing bus arbiter. Syst. Comput. Jpn. 24(3): 13-24 (1993) - 1992
- [c4]Hiroshi Ito, Takashi Matsubara, Takakazu Kurokawa, Yoshiaki Koga:
A Proposal of Fault-Checking Fuzzy Control. ISMVL 1992: 428-434
1980 – 1989
- 1988
- [j1]Takakazu Kurokawa, Hideo Aiso:
3-D VLSI technology in Japan and an example: a syndrome decoder for double error correction. Future Gener. Comput. Syst. 4(2): 145-155 (1988) - 1985
- [c3]Takakazu Kurokawa, Hideo Aiso:
Polynomial Transformer. IEEE Symposium on Computer Arithmetic 1985: 153-158 - 1983
- [c2]Yoshiyasu Takefuji, Takakazu Kurokawa, Hideo Aiso:
Fast matrix solver in GF(2). IEEE Symposium on Computer Arithmetic 1983: 138-143 - [c1]Yoshiyasu Takefuji, Takakazu Kurokawa, Masato Ishizaki, Hideo Aiso:
New Matrix Equation Solvers in GF(2) Employing Cramer with Chio Method. ICPP 1983: 47-50
Coauthor Index
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